PIC12F629-I/MF Microchip Technology, PIC12F629-I/MF Datasheet - Page 22

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PIC12F629-I/MF

Manufacturer Part Number
PIC12F629-I/MF
Description
IC MCU CMOS 8BIT 1K FLASH 8-DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F629-I/MF

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
128Byte
Ram Memory Size
64Byte
Cpu Speed
20MHz
No. Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNXLT08DFN - SOCKET TRANSITION ICE 8DFNAC164032 - ADAPTER PICSTART PLUS 8DFN/DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC12F629/675
REGISTER 3-2:
REGISTER 3-3:
DS41190E-page 20
bit 7-6:
bit 5-0:
bit 7-6
bit 5-4
bit 3
bit 2-0
TRISIO — GPIO TRI-STATE REGISTER (ADDRESS: 85h)
WPU — WEAK PULL-UP REGISTER (ADDRESS: 95h)
bit 7
bit 7
Unimplemented: Read as ’0’
TRISIO<5:0>: General Purpose I/O Tri-State Control bit
1 = GPIO pin configured as an input (tri-stated)
0 = GPIO pin configured as an output.
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPU<2:0>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Note 1: Global GPPU must be enabled for individual pull-ups to be enabled.
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
Note:
U-0
U-0
2: The weak pull-up device is automatically disabled if the pin is in Output mode
(TRISIO = 0).
TRISIO<3> always reads 1.
U-0
U-0
TRISIO5
R/W-x
R/W-1
WPU5
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
TRISIO4
R/W-x
WPU4
R/W-1
TRISIO3
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
R-1
R/W-1
WPU2
TRISIO2 TRISIO1
R/W-x
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-1
WPU1
R/W-x
TRISIO0
WPU0
R/W-1
R/W-x
bit 0
bit 0

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