SAK-XC2766X-96F66L AC Infineon Technologies, SAK-XC2766X-96F66L AC Datasheet - Page 107

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SAK-XC2766X-96F66L AC

Manufacturer Part Number
SAK-XC2766X-96F66L AC
Description
IC MCU 16BIT FLASH PG-LQFP-100
Manufacturer
Infineon Technologies
Series
XC27x6Xr
Datasheet

Specifications of SAK-XC2766X-96F66L AC

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
75
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
51K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KX2766X96F66LACXT
SAK-XC2766X-96F66LACINTR
SP000366063
4.6.6
The following parameters are applicable for communication through the JTAG debug
interface. The JTAG module is fully compliant with IEEE1149.1-2000.
Note: These parameters are not subject to production test but verified by design and/or
Table 33
Parameter
TCK clock period
TCK high time
TCK low time
TCK clock rise time
TCK clock fall time
TDI/TMS setup
to TCK rising edge
TDI/TMS hold
after TCK rising edge
TDO valid
after TCK falling edge
TDO high imped. to valid
from TCK falling edge
TDO valid to high imped.
from TCK falling edge
1) The falling edge on TCK is used to generate the TDO timing.
2) The setup time for TDO is given implicitly by the TCK cycle time.
Data Sheet
characterization.
JTAG Interface Timing
JTAG Interface Timing Parameters
(Operating Conditions apply)
1)
1)2)
1)
Symbol
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
8
9
10
SR
SR
SR
SR
SR
SR
SR
CC
CC
CC
CC
Min.
60
16
16
6
6
10
105
Values
Typ.
50
30
30
30
Max.
8
8
XC2000 Family Derivatives
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Electrical Parameters
Test Condition
C
C
C
C
L
L
L
L
= 50 pF
= 20 pF
= 50 pF
= 50 pF
V2.1, 2008-08
XC2766X

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