MC56F8366VFVE Freescale Semiconductor, MC56F8366VFVE Datasheet - Page 43

• Manufacturer Part Number: MC56F8366VFVE
• Description: IC DSP 16BIT 60MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8366VFVE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 62
• Program Memory Size: 544KB (272K x 16)
• Program Memory Type: FLASH
• Ram Size: 18K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 62
• Data Ram Size: 4 KB
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• Package: 144LQFP
• Family Name: 56F8xxx
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 3.3 V
• On-chip Adc: 4(4-chx12-bit)
• Number Of Timers: 16
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Note: Program RAM is NOT available on the 56F8166 device.
Freescale Semiconductor
Preliminary
1. If Flash Security Mode is enabled, EXTBOOT Mode 1 cannot be used. See Security Features, Part 7.
2. This mode provides maximum compatibility with 56F80x parts while operating externally.
3. “EMI_MODE =0” when EMI_MODE pin is tied to ground at boot up.
4. “EMI_MODE =1” when EMI_MODE pin is tied to V
5. Not accessible in reset configuration, since the address is above P:$00 FFFF. The higher bit address/GPIO (and/or chip se-
6. Not accessible in reset configuration, since the address is above P:$0F FFFF. The higher bit address/GPIO (and/or chip se-
7. Booting from this external address allows prototyping of the internal Boot Flash.
8. Two independent program flash blocks allow one to be programmed/erased while executing from another. Each block must
P:$1F FFFF
P:$10 0000
P:$0F FFFF
P:$05 0000
P:$04 FFFF
P:$04 F800
P:$04 F7FF
P:$04 4000
P:$04 3FFF
P:$04 0000
P:$03 FFFF
P:$02 0000
P:$01 FFFF
P:$01 0000
P:$00 FFFF
P:$00 0000
lects) pins must be reconfigured before this external memory is accessible.
lects) pins must be reconfigured before this external memory is accessible.
have its own mass erase.
Begin/End
Address
External Program Memory
Boot Flash
32KB
COP Reset Address = 04 0002
Boot Location = 04 0000
Internal Program Flash
256KB
Internal Program Flash
256KB
16-Bit External Address Bus
Mode 0 (MA = 0)
Internal Boot
Internal Boot
Table 4-4 Program Memory Map at Reset
On-Chip Program RAM
56F8366 Technical Data, Rev. 7
8
8
5
DD
Reserved
92KB
at boot up.
4KB
External Program Memory
Boot Flash
32KB
(Not Used for Boot in this Mode)
Internal Program Flash
256KB
Internal Program Flash
128KB
External Program Memory
COP Reset Address = 00 0002
Boot Location = 00 0000
16-Bit External Address Bus
EMI_MODE = 0
2
Mode 1
,
3
External Boot
5
1
(MA = 1)
External Program Memory
External Program Memory
COP Reset Address = 04 0002
Boot Location = 04 0000
20-Bit External Address Bus
EMI_MODE = 1
Program Map
4
7
6
7
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