MC56F8366VFVE Freescale Semiconductor, MC56F8366VFVE Datasheet - Page 36
![IC DSP 16BIT 60MHZ 144-LQFP](/photos/12/22/122242/mc56f8366vfve_sml.jpg)
MC56F8366VFVE
Manufacturer Part Number
MC56F8366VFVE
Description
IC DSP 16BIT 60MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet
1.MC56F8366VFVE.pdf
(182 pages)
Specifications of MC56F8366VFVE
Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
544KB (272K x 16)
Program Memory Type
FLASH
Ram Size
18K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
62
Data Ram Size
4 KB
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
Package
144LQFP
Family Name
56F8xxx
Maximum Speed
60 MHz
Operating Supply Voltage
3.3 V
On-chip Adc
4(4-chx12-bit)
Number Of Timers
16
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC56F8366VFVE
Manufacturer:
Freescale
Quantity:
43
Company:
Part Number:
MC56F8366VFVE
Manufacturer:
MOTOLOLA
Quantity:
439
Company:
Part Number:
MC56F8366VFVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8366VFVE
Manufacturer:
FREESCALE
Quantity:
20 000
36
Signal Name
(GPIOE10)
(GPIOE11)
RESET
RSTO
IRQA
IRQB
TD0
TD1
Table 2-2 Signal and Package Information for the 144-Pin LQFP
Pin No.
116
117
54
55
86
85
Schmitt
Schmitt
Schmitt
Schmitt
Output
Output
Output
Input/
Input/
Type
Input
Input
enabled
enabled
enabled
During
pull-up
pull-up
pull-up
Output
Reset
Input,
Input,
Input,
State
56F8366 Technical Data, Rev. 7
TD0 - TD1 — Timer D, Channels 0 and 1
Port E GPIO — These GPIO pins can be individually programmed
as input or output pins.
At reset, these pins default to Timer functionality.
To deactivate the internal pull-up resistor, clear the appropriate bit
of the GPIOE_PUR register. See
External Interrupt Request A and B — The IRQA and IRQB
inputs are asynchronous external interrupt requests during Stop
and Wait mode operation. During other operating modes, they are
synchronized external interrupt requests, which indicate an
external device is requesting service. They can be programmed to
be level-sensitive or negative-edge triggered.
To deactivate the internal pull-up resistor, set the IRQ bit in the
SIM_PUDR register. See
Reset — This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed
in the reset state. A Schmitt trigger input is used for noise
immunity. When the RESET pin is deasserted, the initial chip
operating mode is latched from the EXTBOOT pin. The internal
reset signal will be deasserted synchronous with the internal
clocks after a fixed number of internal clocks.
To ensure complete hardware reset, RESET and TRST should be
asserted together. The only exception occurs in a debugging
environment when a hardware device reset is required and the
JTAG/EOnCE module must not be reset. In this case, assert
RESET but do not assert TRST.
Note: The internal Power-On Reset will assert on initial power-up.
To deactivate the internal pull-up resistor, set the RESET bit in the
SIM_PUDR register. See
Reset Output — This output reflects the internal reset state of the
chip.
Signal Description
Part 6.5.6
Part 6.5.6
Part 6.5.6
for details.
for details.
Freescale Semiconductor
for details.
Preliminary