MC56F8366VFVE Freescale Semiconductor, MC56F8366VFVE Datasheet - Page 23

• Manufacturer Part Number: MC56F8366VFVE
• Description: IC DSP 16BIT 60MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8366VFVE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 62
• Program Memory Size: 544KB (272K x 16)
• Program Memory Type: FLASH
• Ram Size: 18K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 62
• Data Ram Size: 4 KB
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• Package: 144LQFP
• Family Name: 56F8xxx
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 3.3 V
• On-chip Adc: 4(4-chx12-bit)
• Number Of Timers: 16
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Preliminary
Signal Name
(GPIOF0)
(GPIOF1)
(GPIOF2)
(GPIOF3)
(GPIOF4)
(GPIOF5)
(GPIOF6)
(GPIOF7)
(GPIOF8)
D10
D11
D12
D13
D14
D15
D7
D8
D9
Table 2-2 Signal and Package Information for the 144-Pin LQFP
Pin No.
133
134
135
136
137
28
29
30
32
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Type
disabled,
pull-up is
disabled,
pull-up is
output is
output is
In reset,
enabled
In reset,
enabled
During
Reset
State
56F8366 Technical Data, Rev. 7
Data Bus — D7 - D14 specify part of the data for external program
or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), D7 - D14 are tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
Port F GPIO — These eight GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to Data Bus functionality.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOF_PUR register.
Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.
Data Bus — D15 specifies part of the data for external program or
data memory accesses.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
Port F GPIO — This GPIO pin can be individually programmed as
an input or output pin.
At reset, this pin defaults to the data bus function.
To deactivate the internal pull-up resistor, set bit 8 in the
GPIOF_PUR register.
Signal Description
Signal Pins
23