MC56F8366VFVE Freescale Semiconductor, MC56F8366VFVE Datasheet - Page 126
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MC56F8366VFVE
Manufacturer Part Number
MC56F8366VFVE
Description
IC DSP 16BIT 60MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet
1.MC56F8366VFVE.pdf
(182 pages)
Specifications of MC56F8366VFVE
Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
544KB (272K x 16)
Program Memory Type
FLASH
Ram Size
18K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
62
Data Ram Size
4 KB
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
Package
144LQFP
Family Name
56F8xxx
Maximum Speed
60 MHz
Operating Supply Voltage
3.3 V
On-chip Adc
4(4-chx12-bit)
Number Of Timers
16
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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20 000
Two Input/Output pins associated with GPIOD can function as GPIO, EMI (default peripheral) or CAN2
(NOT available in the 56F8166 device) signals. GPIO is the default and is enabled/disabled via the
GPIOD_PER, as shown in
peripheral input/output, then the choice between EMI and CAN2 inputs/outputs is made here in the GPS.
Note: CAN2 is NOT available in the 56F8166 device.
126
1. This applies to the two pins that serve as EMI CSn / CAN2 / GPIOD functions. A separate set of control
GPIO Input
GPIO Output
EMI I/O
CAN2
bits is used for each pin.
Pin Function
Figure 6-11 Overall Control of GPIOD Pads Using SIM_GPS Control
Table 6-3 Control of GPIOD Pads Using SIM_GPS Control
CAN2 Controlled
Figure 6-11
0
0
1
1
EMI Controlled
Control Registers
SIM_ GPS Register
—
—
0
1
56F8366 Technical Data, Rev. 7
and
GPIO Controlled
Table
—
—
0
1
GPIOD_PER Register
0
1
6-3. When GPIOD[1:0] are programmed to operate as
EMI CSn pins are always outputs
CAN2_TX is always an output
CAN2_RX is always an input
0
1
I/O Pad Control
Comments
Freescale Semiconductor
1
Preliminary