M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 95

IC M16C/28 MCU FLASH 96K 80LQFP

M30280FAHP#U5B

Manufacturer Part Number
M30280FAHP#U5B
Description
IC M16C/28 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheets

Specifications of M30280FAHP#U5B

Core Size
16-Bit
Program Memory Size
96KB (96K x 8)
Core Processor
M16C/60
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Controller Family/series
M16C
No. Of I/o's
71
Ram Memory Size
8KB
Cpu Speed
20MHz
No. Of Timers
10
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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M
R
R
e
E
1
. v
Figure 9.3 Interrupt Control Registers
J
6
0
C
2
9
2 /
0 .
B
0
0
8
0
G
4
J
7
a
Interrupt Control Register
o r
0 -
. n
b7
NOTES:
b7
NOTES:
u
2
3
p
1. This bit can only be reset by writing “0” (Do not write “1”).
2. Rewrite the interrupt control register when the interrupt request related to the register is not generated. For
3. If the IFSRi bit in the IFSR register(i = 0 to 5) is “1” (both edges), set the POL bit in the INTiIC register to “0”
4. Set the POL bit in the S3IC or S4IC register to “0” (falling edge) when the IFSR6 bit in the IFSR register is
b6
1. This bit can only be reset by writing “0” (Do not write “1”).
2. Rewrite the interrupt control register when the interrupt request related to the register is not generated. For
3. Use the IFSR2A register to select.
b6
0
, 1
0
details, refer to 20.5 Interrupts.
(falling edge).
set to "0" (SI/O3 selected) or IFSR7 bit in the IFSR reister "0" (SI/O4 selected), respectively.
details, refer to 20.5 Interrupts.
(
M
b5
b5
0
2
0
1
0
b4
b4
6
7
C
b3
b3
2 /
, 8
b2
b2
page 73
M
b1
b1
1
b0
b0
6
C
Bit Symbol
Bit Symbol
2 /
f o
(b7-b6)
(b7-b4)
ILVL0
ILVL0
ILVL1
ILVL2
ILVL1
ILVL2
8
POL
3
(b5)
) B
IR
(2)
IR
Symbol
ICOC0
IC ICOC1IC, IICIC
BTIC, SCLDAIC
BCNIC
DM0IC, DM1IC
KUPIC
ADIC
S0TIC to S2TIC
S0RIC to S2RIC
TA0IC to TA4IC
TB0IC to TB2IC
8
Symbol
INT3IC
S4IC, INT5IC
S3IC, INT4IC
INT0IC to INT2IC
5
Interrupt priority level
select bit
Interrupt request bit
Nothing is assigned.When write, set to "0".
When read, the content is indeterminate.
Interrupt priority level
select bit
Interrupt request bit
Polarity select bit
Reserved bit
Nothing is assigned. When write, set to “0”.
When read, the content is indeterminate
Bit Name
Bit Name
(3)
(3)
Address
0044
0048
0049
005D
16
16
16
16
to 005F
Address
0045
0046
0047
004A
004B
004D
004E
0051
0052
0055
005A
b2 b1 b0
0 0 0: Level 0 (interrupt disabled)
0 0 1: Level 1
0 1 0: Level 2
0 1 1: Level 3
1 0 0: Level 4
1 0 1: Level 5
1 1 0: Level 6
1 1 1: Level 7
0: Interrupt not requested
1: Interrupt requested
b2 b1 b0
0 0 0: Level 0 (interrupt disabled)
0 0 1: Level 1
0 1 0: Level 2
0 1 1: Level 3
1 0 0: Level 4
1 0 1: Level 5
1 1 0: Level 6
1 1 1: Level 7
0: Interrupt not requested
1: Interrupt requested
0: Selects falling edge
1: Selects rising edge
Set to “0”
16
16
16
16
16
16
16
16
16
16
16
16
, 0053
, 0054
, 004C
XX00X000
XX00X000
XX00X000
XX00X000
After Reset
16
16
16
, 004F
, 0050
16
Function
Function
16
16
16
2
2
2
2
(3, 4)
After Reset
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
XXXXX000
2
2
2
2
2
2
2
2
2
2
2
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
(1)
(1)
9. Interrupts

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