MC9S12GC96MFAE Freescale Semiconductor, MC9S12GC96MFAE Datasheet - Page 384
![IC MCU 96K FLASH 25MHZ 48-LQFP](/photos/12/19/121954/mc9s12gc96mfae_sml.jpg)
MC9S12GC96MFAE
Manufacturer Part Number
MC9S12GC96MFAE
Description
IC MCU 96K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12GC16MFUE.pdf
(690 pages)
Specifications of MC9S12GC96MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12GC
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE, M68DKIT912C32SLK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12GC96MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12GC96MFAE
Manufacturer:
FRE/MOT
Quantity:
20 000
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Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
13.1.3
The SCI operation is the same independent of device resource mapping and bus interface mode. Different
power modes are available to facilitate power saving.
13.1.3.1
Normal mode of operation.
13.1.3.2
SCI operation in wait mode depends on the state of the SCISWAI bit in the SCI control register 1
(SCICR1).
13.1.3.3
The SCI is inactive during stop mode for reduced power consumption. The STOP instruction does not
affect the SCI register states, but the SCI module clock will be disabled. The SCI operation resumes from
where it left off after an external interrupt brings the CPU out of stop mode. Exiting stop mode by reset
aborts any transmission or reception in progress and resets the SCI.
384
•
•
•
•
•
•
— Transmission complete
— Receiver full
— Idle receiver input
— Receiver overrun
— Noise error
— Framing error
— Parity error
Receiver framing error detection
Hardware parity checking
1/16 bit-time noise detection
If SCISWAI is clear, the SCI operates normally when the CPU is in wait mode.
If SCISWAI is set, SCI clock generation ceases and the SCI module enters a power-conservation
state when the CPU is in wait mode. Setting SCISWAI does not affect the state of the receiver
enable bit, RE, or the transmitter enable bit, TE.
If SCISWAI is set, any transmission or reception in progress stops at wait mode entry. The
transmission or reception resumes when either an internal or external interrupt brings the CPU out
of wait mode. Exiting wait mode by reset aborts any transmission or reception in progress and
resets the SCI.
Modes of Operation
Run Mode
Wait Mode
Stop Mode
MC9S12C-Family / MC9S12GC-Family
Rev 01.24
Freescale Semiconductor
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