MC9S12E64CFUE Freescale Semiconductor, MC9S12E64CFUE Datasheet - Page 547

IC MCU 64K FLASH 25MHZ 80-QFP

MC9S12E64CFUE

Manufacturer Part Number
MC9S12E64CFUE
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E64CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Package
80PQFP
Family Name
HCS12
Maximum Speed
25 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
60
Interface Type
SCI/SPI
On-chip Adc
16-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
12
Processor Series
S12E
Core
HCS12
Data Ram Size
4 KB
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
Controller Family/series
HCS12/S12X
No. Of I/o's
58
Ram Memory Size
4KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
MC9S12E64CFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12E64CFUE
Manufacturer:
FREESCALE
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Part Number:
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Write: Once in normal and emulation modes, anytime in special modes
This register initializes the position of the internal RAM within the on-chip system memory map.
Freescale Semiconductor
RAM[15:11]
RAMHAL
Field
7:3
0
Internal RAM Map Position — These bits determine the upper five bits of the base address for the system’s
internal RAM array.
RAM High-Align — RAMHAL specifies the alignment of the internal RAM array.
0 Aligns the RAM to the lowest address (0x0000) of the mappable space
1 Aligns the RAM to the higher address (0xFFFF) of the mappable space
Writes to this register take one cycle to go into effect.
Table 19-2. INITRM Field Descriptions
MC9S12E128 Data Sheet, Rev. 1.07
NOTE
Description
Chapter 19 Module Mapping Control (MMCV4)
547

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