MC9S12E64CFUE Freescale Semiconductor, MC9S12E64CFUE Datasheet - Page 429

IC MCU 64K FLASH 25MHZ 80-QFP

MC9S12E64CFUE

Manufacturer Part Number
MC9S12E64CFUE
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E64CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Package
80PQFP
Family Name
HCS12
Maximum Speed
25 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
60
Interface Type
SCI/SPI
On-chip Adc
16-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
12
Processor Series
S12E
Core
HCS12
Data Ram Size
4 KB
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
Controller Family/series
HCS12/S12X
No. Of I/o's
58
Ram Memory Size
4KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MC9S12E64CFUE
Manufacturer:
Freescale Semiconductor
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13.3.2.12 Main Timer Interrupt Flag 1 (TFLG1)
Read: Anytime
Write: Used in the clearing mechanism (set bits cause corresponding bits to be cleared). Writing a zero
will not affect current status of the bit.
Freescale Semiconductor
C[7:4]F
Reset
Field
7:4
W
R
Input Capture/Output Compare Channel “x” Flag — These flags are set when an input capture or output
compare event occurs. Clear a channel flag by writing one to it.
When TFFCA bit in TSCR register is set, a read from an input capture or a write into an output compare channel
(0x0010–0x001F) will cause the corresponding channel flag CxF to be cleared.
C7F
0
7
The newly selected prescale factor will not take effect until the next
synchronized edge where all prescale counter stages equal zero.
C6F
0
6
Figure 13-18. Main Timer Interrupt Flag 1 (TFLG1)
PR2
0
0
0
0
1
1
1
1
Table 13-15. TRLG1 Field Descriptions
Table 13-14. Timer Clock Selection
C5F
MC9S12E128 Data Sheet, Rev. 1.07
0
5
PR1
0
0
1
1
0
0
1
1
C4F
NOTE
0
4
PR0
Description
0
1
0
1
0
1
0
1
0
0
3
Bus Clock / 128
Bus Clock / 16
Bus Clock / 32
Bus Clock / 64
Bus Clock / 1
Bus Clock / 2
Bus Clock / 4
Bus Clock / 8
Timer Clock
Chapter 13 Timer Module (TIM16B4CV1)
0
0
2
0
0
1
0
0
0
429

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