R5F21244SNFP#U0 Renesas Electronics America, R5F21244SNFP#U0 Datasheet - Page 250

IC R8C MCU FLASH 16K 52LQFP

R5F21244SNFP#U0

Manufacturer Part Number
R5F21244SNFP#U0
Description
IC R8C MCU FLASH 16K 52LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/24r
Datasheets

Specifications of R5F21244SNFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21244SNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21244SNFP#U0R5F21244SNFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21244SNFP#U0R5F21244SNFP#X6
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.79
Timer RD Control Register 0
b7 b6 b5 b4
NOTES:
0 0 1
1.
2.
3. The TRDCR1 register is not used in reset synchronous PWM mode.
This setting is enabled w hen the STCLK bit in the TRDFCR register is set to 1 (external clock input enabled).
Bits CKEG1 to CKEG0 are enabled w hen bits TCK2 to TCK0 are set to 101b (TRDCLK input) and the STCLK bit in the
TRDFCR register is set to 1 (external clock input enabled).
Feb 29, 2008
b3 b2
TRDCR0 Register in Reset Synchronous PWM Mode
b1 b0
Bit Symbol
TRDCR0
Symbol
CKEG0
CKEG1
CCLR0
CCLR1
CCLR2
TCK0
TCK1
TCK2
Page 231 of 485
(3)
Count source select bits
External clock edge select bits
TRD0 counter clear select bits
Address
Bit Name
0140h
(2)
b2 b1b0
0 0 0 : f1
0 0 1 : f2
0 1 0 : f4
0 1 1 : f8
1 0 0 : f32
1 0 1 : TRDCLK input
1 1 0 : fOCO40M
1 1 1 : Do not set.
b4 b3
0 0 : Count at the rising edge
0 1 : Count at the falling edge
1 0 : Count at both edges
1 1 : Do not set.
Set to 001b (TRD0 register cleared at compare
match w ith TRDGRA0 register) in reset
synchronous PWM mode.
After Reset
Function
(1)
00h
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW

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