MCHC908JW32FC Freescale Semiconductor, MCHC908JW32FC Datasheet - Page 205

• Manufacturer Part Number: MCHC908JW32FC
• Description: IC MCU 32K FLASH 8MHZ 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908JW32FC

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-QFN
• Controller Family/series: HC08
• No. Of I/o's: 29
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SPI, USB
• Rohs Compliant: Yes
• Processor Series: HC08JW
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USB
• Number Of Programmable I/os: 29
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Chapter 18
Break Module (BRK)
18.1 Introduction
This section describes the break module. The break module can generate a break interrupt that stops
normal program flow at a defined address to enter a background program.
18.2 Features
Features of the break module include:
Freescale Semiconductor
Note: Writing a logic 0 clears BW.
$FE0C
$FE0D
$FE00
$FE03
$FE0E
Addr.
•
•
•
•
Accessible input/output (I/O) registers during the break interrupt
CPU-generated break interrupts
Software-generated break interrupts
COP disabling during break interrupts
SIM Break Status Register
Break Status and Control
SIM Break Flag Control
Register Name
Break Address
Break Address
Register High
Register Low
(BRKSCR)
(SBFCR)
Register
Register
(BRKH)
(SBSR)
(BRKL)
Figure 18-1. Break Module I/O Register Summary
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
BRKE
BCFE
Bit 15
Bit 7
Bit 7
MC68HC908JW32 Data Sheet, Rev. 6
R
0
0
0
0
= Unimplemented
BRKA
14
R
R
6
0
6
0
0
13
R
R
5
0
5
0
0
0
12
R
R
R
4
0
4
0
0
0
= Reserved
11
R
R
3
0
3
0
0
0
10
R
R
2
0
2
0
0
0
SBSW
Note
R
1
0
9
0
1
0
0
0
Bit 0
Bit 8
Bit 0
R
R
0
0
0
0
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