MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 131

IC MCU FLASH 8BIT 8K 20-DIP

MC68HC908JB8JPE

Manufacturer Part Number
MC68HC908JB8JPE
Description
IC MCU FLASH 8BIT 8K 20-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908JB8JPE

Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
HC08
No. Of I/o's
13
Ram Memory Size
256Byte
Cpu Speed
3MHz
No. Of Timers
1
Embedded Interface Type
USB
Rohs Compliant
Yes
Processor Series
HC08JB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USB
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
9.5.4 Resume After Suspend
9.5.4.1 Host Initiated Resume
9.5.4.2 USB Reset Signalling
9.5.4.3 Remote Wakeup
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
The MCU can be activated from the suspend state by normal bus
activity, a USB reset signal, or by a forced resume driven from the MCU.
The host signals resume by initiating resume signalling (K state) for at
least 20ms followed by a standard low-speed EOP signal. This 20ms
ensures that all devices in the USB network are awakened.
After resuming the bus, the host must begin sending bus traffic within
37ms to prevent the device from re-entering suspend mode.
Reset can wake a device from the suspended mode.
The MCU also supports the remote wakeup feature. The firmware has
the ability to exit suspend mode by signaling a resume state to the
upstream host or hub. A non-idle state (K state) on the USB data lines is
accomplished by asserting the FRESUM bit in the UCR1 register.
When using the remote wakeup capability, the firmware must wait for at
least 5ms after the bus is in the idle state before sending the remote
wakeup resume signaling. This allows the upstream devices to get into
their suspend state and prepare for propagating resume signaling. The
FRESUM bit should be asserted to cause the resume state on the USB
data lines for at least 10ms, but not more than 15ms. Note that the
resume signalling is controlled by the FRESUM bit and meeting the
timing specifications is dependent on the firmware. When FRESUM is
cleared by firmware, the data lines will return to their high-impedance
state.
Refer to the register definitions (see
more information about how the force resume (FRESUM) bit can be
used to initiate the remote wakeup feature.
Universal Serial Bus Module (USB)
9.8.6 USB Control Register
Universal Serial Bus Module (USB)
Functional Description
Technical Data
1) for
131

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