MC908JL16CFJER Freescale Semiconductor, MC908JL16CFJER Datasheet - Page 188

IC MCU 8BIT 16K FLASH 32-LQFP

MC908JL16CFJER

Manufacturer Part Number
MC908JL16CFJER
Description
IC MCU 8BIT 16K FLASH 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908JL16CFJER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
26
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
HC08JL
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908JL16E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
For Use With
DEMO908JL16E - BOARD DEMO FOR MC908JL16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
MC908JL16CFJERTR

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Development Support
When the host computer has completed downloading code into the MCU RAM, the host then sends a
RUN command, which executes an RTI, which sends control to the address on the stack pointer.
16.3.3 Baud Rate
The communication baud rate is dependant on oscillator frequency. The state of PTB3 also affects baud
rate if entry to monitor mode is by IRQ = V
pin is at logic zero upon entry into monitor mode, the divide by ratio is 512.
16.3.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See
The data transmit and receive rate can be anywhere from 4800 baud to 28.8k-baud. Transmit and receive
baud rates must be identical.
16.3.5 Echoing
As shown in
pin for error checking.
Any result of a command appears after the echo of the last byte of the command.
188
Figure 16-10
Figure
BREAK
SENT TO
MONITOR
Blank reset vector,
$A5
Monitor Mode
ECHO
START
IRQ = V
IRQ = V
BIT
Entry By:
and
16-12, the monitor ROM immediately echoes each received byte back to the PTB0
START
START
BIT
BIT
Figure
BIT 0
TST
DD
READ
BIT 0
BIT 0
Figure 16-11. Sample Monitor Waveforms
BIT 1
16-11.)
Table 16-3. Monitor Baud Rate Selection
BIT 1
BIT 1
Figure 16-10. Monitor Data Format
READ
Figure 16-12. Read Transaction
MC68HC908JL16 Data Sheet, Rev. 1.1
BIT 2
BIT 2
BIT 2
OSC1 Clock
4.9152 MHz
9.8304 MHz
4.9152 MHz
9.8304 MHz
4.9152 MHz
Frequency
TST
BIT 3
ADDR. HIGH
. When PTB3 is high, the divide by ratio is 1024. If the PTB3
BIT 3
BIT 3
BIT 4
BIT 4
BIT 4
ADDR. HIGH ADDR. LOW
BIT 5
BIT 5
BIT 5
PTB3
X
X
BIT 6
0
1
1
BIT 6
BIT 6
BIT 7
BIT 7
BIT 7
ADDR. LOW
STOP
BIT
STOP
STOP
Baud Rate
BIT
BIT
9600 bps
9600 bps
4800 bps
9600 bps
4800 bps
START
NEXT
BIT
START
START
NEXT
NEXT
BIT
BIT
RESULT
DATA
Freescale Semiconductor

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