MC908JL16CFJER Freescale Semiconductor, MC908JL16CFJER Datasheet - Page 154

• Manufacturer Part Number: MC908JL16CFJER
• Description: IC MCU 8BIT 16K FLASH 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL16CFJER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 26
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• For Use With: DEMO908JL16E - BOARD DEMO FOR MC908JL16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: MC908JL16CFJERTR

External Interrupt (IRQ)
11.5 IRQ Status and Control Register (INTSCR)
The IRQ status and control register (INTSCR) controls and monitors operation of the IRQ module. The
INTSCR has the following functions:
IRQF — IRQ Flag Bit
ACK — IRQ Interrupt Request Acknowledge Bit
IMASK — IRQ Interrupt Mask Bit
MODE — IRQ Edge/Level Select Bit
IRQPUD — IRQ Pin Pull-Up Disable Bit
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This read-only status bit is high when the IRQ interrupt is pending.
Writing a logic one to this write-only bit clears the IRQ latch. ACK always reads as logic zero. Reset
clears ACK.
Writing a logic one to this read/write bit disables IRQ interrupt requests. Reset clears IMASK.
This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears MODE.
IRQPUD disconnects the internal pull-up on the IRQ pin.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
1 = Internal pull-up is disconnected
0 = Internal pull-up is connected between IRQ pin and V
Shows the state of the IRQ flag
Clears the IRQ latch
Masks IRQ and interrupt request
Controls triggering sensitivity of the IRQ interrupt pin
Address: $001D
Address: $001E
Reset:
Reset:
Read:
Read:
Write:
Write:
POR:
IRQPUD
Figure 11-3. IRQ Status and Control Register (INTSCR)
Bit 7
Bit 7
R
0
0
0
0
Figure 11-4. Configuration Register 2 (CONFIG2)
= Unimplemented
= Reserved
R
6
0
0
6
0
0
MC68HC908JL16 Data Sheet, Rev. 1.1
R
5
0
0
5
0
0
U = Unaffected
LVIT1
U
4
0
0
4
0
LVIT0
IRQF
U
3
0
3
0
DD
ACK
R
2
0
2
0
0
IMASK
R
1
0
1
0
0
Freescale Semiconductor
MODE
Bit 0
Bit 0
R
0
0
0