ST10F269Z2Q3 STMicroelectronics, ST10F269Z2Q3 Datasheet - Page 168

• Manufacturer Part Number: ST10F269Z2Q3
• Description: IC FLASH MEM 256KBIT 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F269Z2Q3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-QFP
• Processor Series: ST10F26x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SSC, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 0.3 V to 4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 40MHz
• Total Internal Ram Size: 12KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-2042

21.4.12 - CLKOUT and READY
V
Table 50 : CLKOUT and READY Characteristics (PQFP144 devices)
Notes: 1. These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
168/184
t
t
t
t
t
t
t
t
t
t
t
t
29
30
31
32
33
34
35
36
37
58
59
60
DD
Symbol
= 5V
2. Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This adds even more time
for deactivating READY.
The 2t
CC
CC
CC
CC
CC
CC
SR
SR
SR
SR
SR
SR
A
and t
10%, V
CLKOUT cycle time
CLKOUT high time
CLKOUT low time
CLKOUT rise time
CLKOUT fall time
CLKOUT rising edge to
ALE falling edge
Synchronous READY
setup time to CLKOUT
Synchronous READY
hold time after CLKOUT
Asynchronous READY
low time
Asynchronous READY
setup time
Asynchronous READY
hold time
Async. READY hold time after
RD, WR high (Demultiplexed
Bus)
C
refer to the next following bus cycle, t
SS
Parameter
= 0V, T
A
= -40 to + 125°C, C
1)
1)
2)
Minimum
-2 + t
Maximum CPU Clock
12.5
12.5
F
25
35
refers to the current bus cycle.
4
3
–
–
2
2
0
A
= 40 MHz
L
= 50pF, PQFP144 devices
0 + 2t
Maximum
8 + t
A
25
+ t C + t
2)
–
–
4
4
–
–
–
–
–
A
F
2TCL + 10
Minimum
TCL – 8.5
TCL – 9.5
-2 + t
2TCL
1/2TCL = 1 to 40 MHz
12.5
12.5
Variable CPU Clock
–
–
2
2
0
A
+ 2t
TCL - 12.5
Maximum
A
8 + t
2TCL
+ t C + t
–
–
4
4
–
–
–
–
–
A
ST10F269
F
2)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns