Z8F0411HH020SG Zilog, Z8F0411HH020SG Datasheet - Page 219

• Manufacturer Part Number: Z8F0411HH020SG
• Description: IC ENCORE MCU FLASH 4K 20SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0411HH020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 11
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Controller Family/series: Z8
• No. Of I/o's: 11
• Ram Memory Size: 1KB
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: Z8F041xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 11
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4101; Z8F0411HH020SG

PS022517-0508
(Output)
(Input)
(Output)
CTS
DE
TXD
Table 111. UART Timing with CTS
Parameter Abbreviation
T
T
T
UART Timing
1
2
3
Figure 54
Clear To Send input pin (CTS) is used for flow control. In this example, it is assumed that
the Driver Enable polarity has been configured to be Active Low and is represented here
by DE. The CTS to DE assertion delay (T1) assumes the UART Transmit Data Register
has been loaded with data prior to CTS assertion.
T
CTS Fall to DE Assertion Delay
DE Assertion to TXD Falling Edge (Start)
Delay
End of Stop Bit(s) to DE Deassertion Delay
1
and
Table 111
T
2
Figure 54. UART Timing with CTS
Start
provide timing information for UART pins for the case where the
Bit 0
Bit 1
2 * XIN period 2 * XIN period
1 * XIN period 2 * XIN period
1 Bit period
Minimum
Z8 Encore! XP
Bit 7
Delay (ns)
Parity
Product Specification
1 * XIN period
Electrical Characteristics
+ 1 Bit period
1 Bit period +
Maximum
Stop
Stop Bit(s)
®
End of
F0822 Series
T
3
206