LPC2157FBD100,551 NXP Semiconductors, LPC2157FBD100,551 Datasheet - Page 29

• Manufacturer Part Number: LPC2157FBD100,551
• Description: IC ARM7 MCU FLASH 512K 100LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2100r

Specifications of LPC2157FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 38
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC21
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 40 KB
• Interface Type: I2C/SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4524; 935287348551

NXP Semiconductors
LPC2157_2158_1
Product data sheet
6.21.13.1 I
6.21.11 Output bank selector
6.21.12 Input bank selector
6.21.13 Blinker
6.21.14 Input filters
The LCD controller includes a RAM bank switching feature in the static and 1:2 drive
modes. In the static drive mode, the BANK SELECT command may request the contents
of bit 2 to be selected for display instead of the contents of bit 0. In 1:2 mode, the contents
of bits 2 and 3 may be selected instead of bits 0 and 1. This allows display information to
be prepared in an alternative bank and then selected for display when it is assembled.
The input bank selector loads display data into the display RAM based on the selected
LCD drive configuration. The BANK SELECT command can be used to load display data
in bit 2 in static drive mode or in bits 2 and 3 in 1:2 mode. The input bank selector
functions are independent of the output bank selector.
The LCD controller has a very versatile display blinking capability. The whole display can
blink at a frequency selected by the BLINK command. Each blink frequency is a multiple
integer value of the clock frequency; the ratio between the clock frequency and blink
frequency depends on the blink mode selected, as shown in
An additional feature allows an arbitrary selection of LCD segments to be blinked in the
static and 1:2 drive modes. This is implemented without any communication overheads by
the output bank selector which alternates the displayed data between the data in the
display RAM bank and the data in an alternative RAM bank at the blink frequency. This
mode can also be implemented by the BLINK command.
The entire display can be blinked at a frequency other than the nominal blink frequency by
sequentially resetting and setting the display enable bit E at the required rate using the
MODE SET command.
Table 5.
Blink modes 0.5 Hz, 1 Hz and 2 Hz, and nominal blink frequencies 0.5 Hz, 1 Hz and 2 Hz
correspond to an oscillator frequency (f
frequency range is 397 Hz to 3046 Hz.
The LCD controller acts as an I
subaddress inputs A0, A1 and A2 are tied to V
To enhance noise immunity in electrically adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
Blink mode
Off
2 Hz
1 Hz
0.5 Hz
2
C-bus controller
Blinking frequencies
Rev. 01 — 15 October 2008
Normal operating mode ratio Normal blink frequency
-
f
f
f
osc(ctrl)LCD
osc(ctrl)LCD
osc(ctrl)LCD
2
C-bus slave receiver. In the LPC2157/2158 the hardware
osc(ctrl)LCD
/768
/1536
/3072
Single-chip 16-bit/32-bit microcontrollers
SS
) of 1536 Hz at pin CLK. The oscillator
setting the hardware subaddress = 0.
LPC2157/2158
blinking off
2 Hz
1 Hz
0.5 Hz
Table
5.
© NXP B.V. 2008. All rights reserved.
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