ADUC7024BCPZ62 Analog Devices Inc, ADUC7024BCPZ62 Datasheet - Page 64

• Manufacturer Part Number: ADUC7024BCPZ62
• Description: IC MCU FLSH 62K ANLG I/O 64LFCSP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7024BCPZ62

• Core Size: 16/32-Bit
• Program Memory Size: 62KB (62K x 8)
• Design Resources: Sensing Low-g Acceleration Using ADXL345 Digital Accelerometer Connected to ADuC7024 (CN0133)
• Core Processor: ARM7
• Speed: 44MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PLA, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 30
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFCSP
• Controller Family/series: (ARM7) ADUC
• No. Of I/o's: 30
• Ram Memory Size: 8KB
• Cpu Speed: 44MHz
• No. Of Timers: 4
• Digital Ic Case Style: LFCSP
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Package: 64LFCSP EP
• Device Core: ARM7TDMI
• Family Name: ADuC7xxx
• Maximum Speed: 44 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 30
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• On-chip Dac: 2-chx12-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADuC7019/20/21/22/24/25/26/27/28/29
Table 78. GPIO Pin Function Descriptions
Port
0
1
2
3
4
1
2
Table 79. GPxCON Registers
Name
GP0CON
GP1CON
GP2CON
GP3CON
GP4CON
When configured in Mode 1, P0.7 is ECLK by default, or core clock output. To
The CONV
configure it as a clock input, the MDCLK bits in PLLCON must be set to 11.
Pin
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
START
signal is active in all modes of P2.0.
00
GPIO
GPIO
GPIO
GPIO/IRQ0
GPIO/IRQ1
GPIO/T1
GPIO
GPIO/T1
GPIO
GPIO
GPIO
GPIO/IRQ2
GPIO/IRQ3
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Address
0xFFFFF400
0xFFFFF404
0xFFFFF408
0xFFFFF40C
0xFFFFF410
Configuration
01
CMP
PWM2
PWM2
TRST
PWM
ADC
MRST
ECLK/XCLK
SIN
SOUT
RTS
CTS
RI
DCD
DSR
DTR
CONV
PWM0
PWM0
PWM0
PWM0
PWM1
PWM1
PWM0
PWM0
PWM1
PWM1
PWM2
PWM2
PWM
PWM
Default Value
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
BUSY
TRIP
TRIP
SYNC
START
H
L
H
L
H
L
H
L
H
L
H
L
H
L
2
1
10
MS0
BLE
BHE
A16
MS1
MS2
SIN
SCL0
SDA0
SCL1
SDA1
CLK
MISO
MOSI
CSL
SOUT
WS
RS
AE
MS0
MS1
MS2
MS3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
Access
R/W
R/W
R/W
R/W
R/W
11
PLAI[7]
ADC
PLAO[1]
PLAO[2]
PLAO[3]
PLAO[4]
PLAI[0]
PLAI[1]
PLAI[2]
PLAI[3]
PLAI[4]
PLAI[5]
PLAI[6]
PLAO[0]
PLAO[5]
PLAO[6]
PLAO[7]
PLAI[8]
PLAI[9]
PLAI[10]
PLAI[11]
PLAI[12]
PLAI[13]
PLAI[14]
PLAI[15]
PLAO[8]
PLAO[9]
PLAO[10]
PLAO[11]
PLAO[12]
PLAO[13]
PLAO[14]
PLAO[15]
BUSY
Rev. C | Page 64 of 96
GPxCON are the Port x control registers, which select the
function of each pin of Port x as described in Table 80.
Table 80. GPxCON MMR Bit Descriptions
Bit
31:30
29:28
27:26
25:24
23:22
21:20
19:18
17:16
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
Table 81. GPxPAR Registers
Name
GP0PAR
GP1PAR
GPxPAR program the parameters for Port 0 and Port 1. Note that
the GPxDAT MMR must always be written after changing the
GPxPAR MMR.
Table 82. GPxPAR MMR Bit Descriptions
Bit
31:29
28
27:25
24
23:21
20
19:17
16
15:13
12
11:9
8
7:5
4
3:1
0
Description
Reserved.
Select function of the Px.7 pin.
Reserved.
Select function of the Px.6 pin.
Reserved.
Select function of the Px.5 pin.
Reserved.
Select function of the Px.4 pin.
Reserved.
Select function of the Px.3 pin.
Reserved.
Select function of the Px.2 pin.
Reserved.
Select function of the Px.1 pin.
Reserved.
Select function of the Px.0 pin.
Address
0xFFFFF42C
0xFFFFF43C
Description
Reserved.
Pull-Up Disable Px.7.
Reserved.
Pull-Up Disable Px.6.
Reserved.
Pull-Up Disable Px.5.
Reserved.
Pull-Up Disable Px.4.
Reserved.
Pull-Up Disable Px.3.
Reserved.
Pull-Up Disable Px.2.
Reserved.
Pull-Up Disable Px.1.
Reserved.
Pull-Up Disable Px.0.
Default Value
0x20000000
0x00000000
Access
R/W
R/W