ADUC7024BCPZ62 Analog Devices Inc, ADUC7024BCPZ62 Datasheet - Page 55

• Manufacturer Part Number: ADUC7024BCPZ62
• Description: IC MCU FLSH 62K ANLG I/O 64LFCSP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7024BCPZ62

• Core Size: 16/32-Bit
• Program Memory Size: 62KB (62K x 8)
• Design Resources: Sensing Low-g Acceleration Using ADXL345 Digital Accelerometer Connected to ADuC7024 (CN0133)
• Core Processor: ARM7
• Speed: 44MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PLA, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 30
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFCSP
• Controller Family/series: (ARM7) ADUC
• No. Of I/o's: 30
• Ram Memory Size: 8KB
• Cpu Speed: 44MHz
• No. Of Timers: 4
• Digital Ic Case Style: LFCSP
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Package: 64LFCSP EP
• Device Core: ARM7TDMI
• Family Name: ADuC7xxx
• Maximum Speed: 44 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 30
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• On-chip Dac: 2-chx12-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Example source code
3)) //ensures timer value loaded
//enable T2 interrupt
// Set Core into Nap mode
In noisy environments, noise can couple to the external crystal
pins, and PLL may lose lock momentarily. A PLL interrupt is
provided in the interrupt controller. The core clock is immediately
halted, and this interrupt is only serviced when the lock is restored.
In case of crystal loss, the watchdog timer should be used. During
initialization, a test on the RSTSTA register can determine if the
reset came from the watchdog timer.
External Clock Selection
To switch to an external clock on P0.7, configure P0.7 in
Mode 1. The external clock can be up to 44 MHz, providing
the tolerance is 1%.
Table 57. Operating Modes
Mode
Active
Pause
Nap
Sleep
Stop
1
Table 58. Typical Current Consumption at 25°C in Milliamperes
PC[2:0]
000
001
010
011
100
X indicates that the part is powered on.
while ((T2VAL == t2val_old) || (T2VAL >
IRQEN = 0x10;
PLLKEY1 = 0xAA;
PLLCON = 0x01;
PLLKEY2 = 0x55;
POWKEY1 = 0x01;
POWCON = 0x27;
POWKEY2 = 0xF4;
T2LD = 5;
TCON = 0x480;
Core
X
Mode
Active
Pause
Nap
Sleep
Stop
Peripherals
X
X
1
CD = 0
33.1
22.7
3.8
0.4
0.4
PLL
X
X
X
CD = 1
21.2
13.3
3.8
0.4
0.4
XTAL/T2/T3
X
X
X
X
Rev. C | Page 55 of 96
CD = 2
13.8
8.5
3.8
0.4
0.4
Example source code
> 3)) //ensures timer value loaded
//enable T2 interrupt
// Set Core into Nap mode
Power Control System
A choice of operating modes is available on the ADuC7019/20/
21/22/24/25/26/27/28/29. Table 57 describes what part is powered
on in the different modes and indicates the power-up time.
Table 58 gives some typical values of the total current consump-
tion (analog + digital supply currents) in the different modes,
depending on the clock divider bits. The ADC is turned off. Note
that these values also include current consumption of the
regulator and other parts on the test board where these values
are measured.
IRQ0 to IRQ3
X
X
X
X
X
ADuC7019/20/21/22/24/25/26/27/28/29
CD = 3
10
6.1
3.8
0.4
0.4
while ((T2VAL == t2val_old) || (T2VAL
IRQEN = 0x10;
PLLKEY1 = 0xAA;
PLLCON = 0x03;
PLLKEY2 = 0x55;
POWKEY1 = 0x01;
POWCON = 0x27;
POWKEY2 = 0xF4;
T2LD = 5;
TCON = 0x480;
CD = 4
8.1
4.9
3.8
0.4
0.4
Start-Up/Power-On Time
130 ms at CD = 0
24 ns at CD = 0; 3 μs at CD = 7
24 ns at CD = 0; 3 μs at CD = 7
1.58 ms
1.7 ms
//Select external clock
CD = 5
7.2
4.3
3.8
0.4
0.4
CD = 6
6.7
4
3.8
0.4
0.4
CD = 7
6.45
3.85
3.8
0.4
0.4