LPC3250FET296/01,5 NXP Semiconductors, LPC3250FET296/01,5 Datasheet - Page 34

IC ARM9 MCU 256K 296-TFBGA

LPC3250FET296/01,5

Manufacturer Part Number
LPC3250FET296/01,5
Description
IC ARM9 MCU 256K 296-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC32x0r
Datasheets

Specifications of LPC3250FET296/01,5

Package / Case
296-TFBGA
Core Processor
ARM9
Core Size
16/32-Bit
Speed
266MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, Motor Control PWM, PWM, WDT
Number Of I /o
51
Program Memory Type
ROMless
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC32
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
256 KB
Interface Type
EMC
Maximum Clock Frequency
266 MHz
Number Of Timers
6
Operating Supply Voltage
1.31 V to 1.39 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, DK-57TS-LPC3250, DK-57VTS-LPC3250, SOMDIMM-LPC3250
Development Tools By Supplier
OM11016, OM11021, OM11045
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 3 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4962
935290766551

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NXP Semiconductors
LPC3220_30_40_50_1
Preliminary data sheet
7.8.1.1 Standard UARTs
7.8.1.2 High-speed UARTs
7.8.1 UARTs
7.8.2 SPI serial I/O controller
The LPC3220/30/40/50 contains seven UARTs. Four are standard UARTs, and three are
high-speed UARTs.
The four standard UARTs are compatible with the INS16Cx50. These UARTs support
rates up to 460800 bit/s from a 13 MHz peripheral clock.
Features
The three high-speed UARTs are designed to support rates up to 921600 bit/s from a
13 MHz peripheral clock for on-board communication in low noise conditions. This is
accomplished by changing the over sampling from 16 to 14 and altering the rate
generation logic.
Features
The LPC3220/30/40/50 has two Serial Peripheral Interfaces (SPI). The SPI is a 3-wire
serial interface that is able to interface with a large range of serial peripheral or memory
devices (SPI mode 0 to 3 compatible slave devices).
Each standard UART has 64 byte Receive and Transmit FIFOs.
Receiver FIFO trigger points at 16, 32 , 48 , and 60 Bytes.
Transmitter FIFO trigger points at 0, 4 , 8, and 16 Bytes.
Register locations conform to the “550” industry standard.
Each standard UART has a fractional rate pre-divider and an internal baud rate
generator.
The standard UARTs support three clocking modes: on, off, and auto-clock. The
auto-clock mode shuts off the clock to the UART when it is idle.
UART 6 includes an IrDA mode to support infrared communication.
The standard UARTs are designed to support data rates of (2400, 4800, 9600,
19200, 38400, 57600, 115200, 230400, 460800) bit/s.
Each UART includes an internal loopback mode.
Each high-speed UART has 64 byte Receive and Transmit FIFOs.
Receiver FIFO trigger points at 1, 4, 8, 16, 32, and 48 Byte.
Transmitter FIFO trigger points at 0, 4, and 8 Byte.
Each high-speed UART has an internal baud rate generator.
The high-speed UARTs are designed to support data rates of (2400, 4800, 9600,
19200, 38400, 57600, 115200, 230400, 460800, 921600) bit/s.
The three high speed UARTs only support (8N1) 8-bit data word length, 1-stop bit, no
parity, and no flow control as a the communications protocol.
Each UART includes an internal loopback mode.
Rev. 01 — 6 February 2009
LPC3220/30/40/50
16/32-bit ARM microcontrollers
© NXP B.V. 2009. All rights reserved.
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