LPC2210FBD144/01,5 NXP Semiconductors, LPC2210FBD144/01,5 Datasheet - Page 25

• Manufacturer Part Number: LPC2210FBD144/01,5
• Description: IC ARM7 MCU 16KRAM W/ADC 144LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2200r

Specifications of LPC2210FBD144/01,5

• Program Memory Type: ROMless
• Package / Case: 144-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 76
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC22
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SPI/SSP/UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10091 - KIT DEV PHYCORE-ARM7/LPC2220622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-1757 - BOARD EVAL FOR LPC220X ARM MCU
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4012; 935282078551; LPC2210FBD144/01-S

NXP Semiconductors
LPC2210_2220_6
Product data sheet
6.14.1 Features
6.15.1 Features
6.15.2 Description
6.14 SPI serial I/O controller
6.15 SSP controller
The LPC2210/2220 each contain two SPIs. The SPI is a full duplex serial interface,
designed to be able to handle multiple masters and slaves connected to a given bus. Only
a single master and a single slave can communicate on the interface during a given data
transfer. During a data transfer the master always sends a byte of data to the slave, and
the slave always sends a byte of data to the master.
This peripheral is available in LPC2210/01 and LPC2220 only.
The SSP is a controller capable of operation on a SPI, 4-wire SSI, or Microwire bus. It can
interact with multiple masters and slaves on the bus. Only a single master and a single
slave can communicate on the bus during a given data transfer. Data transfers are in
principle full duplex, with frames of 4 bits to 16 bits of data flowing from the master to the
slave and from the slave to the master.
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Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
Compliant with SPI specification.
Synchronous, serial, full duplex, communication.
Combined SPI master and slave.
Maximum data bit rate of one eighth of the input clock rate.
Compatible with Motorola’s SPI, Texas Instrument’s 4-wire SSI, and National
Semiconductor’s Microwire buses.
Synchronous serial communication.
Master or slave operation.
8-frame FIFOs for both transmit and receive.
4 bits to 16 bits per frame.
2
C-bus may be used for test and diagnostic purposes.
Rev. 06 — 11 December 2008
16/32-bit ARM microcontrollers
LPC2210/2220
© NXP B.V. 2008. All rights reserved.
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