LPC2210FBD144/01,5 NXP Semiconductors, LPC2210FBD144/01,5 Datasheet - Page 16

• Manufacturer Part Number: LPC2210FBD144/01,5
• Description: IC ARM7 MCU 16KRAM W/ADC 144LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2200r

Specifications of LPC2210FBD144/01,5

• Program Memory Type: ROMless
• Package / Case: 144-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 76
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC22
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SPI/SSP/UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10091 - KIT DEV PHYCORE-ARM7/LPC2220622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-1757 - BOARD EVAL FOR LPC220X ARM MCU
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4012; 935282078551; LPC2210FBD144/01-S

NXP Semiconductors
LPC2210_2220_6
Product data sheet
6.4 Interrupt controller
The VIC accepts all of the interrupt request inputs and categorizes them as Fast Interrupt
Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by
programmable settings. The programmable assignment scheme means that priorities of
interrupts from the various peripherals can be dynamically assigned and adjusted.
FIQ has the highest priority. If more than one request is assigned to FIQ, the VIC
combines the requests to produce the FIQ signal to the ARM processor. The fastest
possible FIQ latency is achieved when only one request is classified as FIQ, because then
the FIQ service routine can simply start dealing with that device. But if more than one
request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC
that identifies which FIQ source(s) is (are) requesting an interrupt.
Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned
to this category. Any of the interrupt requests can be assigned to any of the 16 vectored
IRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest.
Fig 4. LPC2210/2220 memory map
3.75 GB
4.0 GB
3.5 GB
3.0 GB
2.0 GB
1.0 GB
0.0 GB
Rev. 06 — 11 December 2008
64 kB ON-CHIP STATIC RAM (LPC2220)
16 kB ON-CHIP STATIC RAM (LPC2210)
BOOT BLOCK (RE-MAPPED FROM
RESERVED ADDRESS SPACE
RESERVED ADDRESS SPACE
EXTERNAL MEMORY BANK 3
EXTERNAL MEMORY BANK 2
EXTERNAL MEMORY BANK 1
EXTERNAL MEMORY BANK 0
RESERVED ADDRESS SPACE
ON-CHIP ROM MEMORY)
AHB PERIPHERALS
APB PERIPHERALS
16/32-bit ARM microcontrollers
LPC2210/2220
002aaa795
0xFFFF FFFF
0xF000 0000
0xEFFF FFFF
0xE000 0000
0xDFFF FFFF
0x8400 0000
0x83FF FFFF
0x8300 0000
0x82FF FFFF
0x8200 0000
0x81FF FFFF
0x8100 0000
0x80FF FFFF
0x8000 0000
0x7FFF FFFF
0x7FFF E000
0x7FFF DFFF
0x4001 0000
0x4000 FFFF
0x4000 4000
0x4000 3FFF
0x4000 0000
0x3FFF FFFF
0x0000 0000
© NXP B.V. 2008. All rights reserved.
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