DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 217

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

Timing Characteristics
Timing Diagrams
Timing Diagrams.See Timing Characteristics
Timing Requirements
© 2006 Microchip Technology Inc.
A/D Conversion
Bandgap Start-up Time............................................. 182
CAN Module I/O........................................................ 200
CLKOUT and I/O....................................................... 180
External Clock........................................................... 176
I
I
Input Capture (CAPX) ............................................... 186
Motor Control PWM Module...................................... 188
Motor Control PWM Module Falult............................ 188
OC/PWM Module ...................................................... 187
Oscillator Start-up Timer ........................................... 181
Output Compare Module........................................... 186
Power-up Timer ........................................................ 181
QEI Module Index Pulse ........................................... 190
Reset......................................................................... 181
SPI Module
TimerQ (QEI Module) External Clock ....................... 185
Type A, B and C Timer External Clock ..................... 183
Watchdog Timer........................................................ 181
Center Aligned PWM .................................................. 89
Dead-Time .................................................................. 91
Edge Aligned PWM..................................................... 89
PWM Output ............................................................... 77
Time-out Sequence on Power-up (MCLR Not
Time-out Sequence on Power-up (MCLR Not
Time-out Sequence on Power-up (MCLR
A/D Conversion
Bandgap Start-up Time............................................. 182
Brown-out Reset ....................................................... 182
CLKOUT and I/O....................................................... 180
External Clock........................................................... 177
I
I
Input Capture ............................................................ 186
Motor Control PWM Module...................................... 188
Oscillator Start-up Timer ........................................... 182
Output Compare Module........................................... 186
Power-up Timer ........................................................ 182
QEI Module
Quadrature Decoder ................................................. 189
Reset......................................................................... 182
2
2
2
2
C Bus Data
C Bus Start/Stop Bits
C Bus Data (Master Mode)..................................... 197
C Bus Data (Slave Mode)....................................... 198
10-Bit High-speed (CHPS = 01,
10-Bit High-speed (CHPS = 01, SIMSAM = 0,
Master Mode ..................................................... 196
Slave Mode ....................................................... 198
Master Mode ..................................................... 196
Slave Mode ....................................................... 198
Master Mode (CKE = 0) .................................... 191
Master Mode (CKE = 1) .................................... 192
Slave Mode (CKE = 0) ...................................... 193
Slave Mode (CKE = 1) ...................................... 194
Tied to V
Tied to V
Tied to V
10-Bit High-speed ............................................. 205
External Clock................................................... 185
Index Pulse ....................................................... 190
SIMSAM = 0, ASAM = 0, SSRC = 000) .... 203
ASAM = 1, SSRC = 111,
SAMC = 00001) ........................................ 204
DD
DD
DD
), Case 1......................................... 146
), Case 2......................................... 146
) ...................................................... 146
Timing Specifications
Trap Vectors ....................................................................... 40
U
UART
Unit ID Locations .............................................................. 139
Universal Asynchronous Receiver Transmitter
W
Wake-up from Sleep ......................................................... 139
Wake-up from Sleep and Idle ............................................. 41
Watchdog Timer
Watchdog Timer (WDT)............................................ 139, 149
WWW Address ................................................................. 216
WWW, On-Line Support ....................................................... 4
Simple OC/PWM Mode ............................................ 187
SPI Module
Type A Timer External Clock .................................... 183
Type B Timer External Clock .................................... 184
Type C Timer External Clock.................................... 184
Watchdog Timer ....................................................... 182
PLL Clock ................................................................. 178
Address Detect Mode ............................................... 111
Auto Baud Support ................................................... 111
Baud Rate Generator ............................................... 111
Enabling and Setting Up UART ................................ 109
Loopback Mode ........................................................ 111
Module Overview...................................................... 107
Operation During CPU Sleep and Idle Modes.......... 112
Receiving Data ......................................................... 110
Reception Error Handling ......................................... 110
Transmitting Data ..................................................... 109
UART1 Register Map ............................................... 113
UART2 Register Map ............................................... 113
Module (UART)......................................................... 107
Timing Characteristics .............................................. 181
Timing Requirements ............................................... 182
Enabling and Disabling............................................. 149
Operation.................................................................. 149
Master Mode (CKE = 0).................................... 191
Master Mode (CKE = 1).................................... 192
Slave Mode (CKE = 0)...................................... 193
Slave Mode (CKE = 1)...................................... 195
Disabling........................................................... 109
Enabling ........................................................... 109
Setting Up Data, Parity and Stop
In 8-bit or 9-bit Data Mode................................ 110
Interrupt ............................................................ 110
Receive Buffer (UxRCB)................................... 110
Framing Error (FERR) ...................................... 111
Idle Status ........................................................ 111
Parity Error (PERR) .......................................... 111
Receive Break .................................................. 111
Receive Buffer Overrun Error (OERR Bit) ........ 110
In 8-bit Data Mode ............................................ 109
In 9-bit Data Mode ............................................ 109
Interrupt ............................................................ 110
Transmit Buffer (UxTXB) .................................. 109
Bit Selections............................................ 109
dsPIC30F6010
DS70119E-page 215