AT91SAM9261B-CU Atmel, AT91SAM9261B-CU Datasheet - Page 19

• Manufacturer Part Number: AT91SAM9261B-CU
• Description: MCU ARM9 ULTRA LOW PWR 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Cpu Family: AT91
• Device Core: ARM926EJ-S
• Device Core Size: 32b
• Frequency (max): 240MHz
• Total Internal Ram Size: 160KB
• # I/os (max): 96
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.2/1.8/3.3V
• Operating Supply Voltage (max): 1.32/1.95/3.6V
• Operating Supply Voltage (min): 1.08/1.65/2.7/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 217
• Package Type: LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 160 KB
• Interface Type: JTAG,SPI, SSC, TWI, UART
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 96
• Ram Memory Size: 160KB
• Cpu Speed: 190MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Table 8-5.
Note:
8.1.1.2
8.1.1.3
8.1.1.4
6062LS–ATARM–23-Mar-09
Decoded
Area
SRAM C
SRAM A
SRAM B
(DTCM)
Internal
Internal
Internal
(ITCM)
(AHB)
1. Configuration after reset.
Internal ROM
LCD Controller
USB Host Port
16 Kbyte Block Allocation
Address
0x0010 0000
0x0010 4000
0x0010 8000
0x0010 C000
0x0020 0000
0x0020 4000
0x0020 8000
0x0020 C000
0x0030 0000
0x0030 4000
0x0030 8000
0x0030 C000
0x0031 0000
0x0031 4000
0x0031 8000
0x0031 C000
0x0032 0000
0x0032 4000
The memory blocks assigned to SRAM A, SRAM B and SRAM C areas are not contiguous and
when the user dynamically changes the Internal SRAM configuration, the new 16 Kbyte block
organization may affect the previous configuration from a software point of view.
Table 8-5
assignments.
The AT91SAM9261 integrates a 32 Kbyte Internal ROM mapped at address 0x0040 0000. It is
also accessible at address 0x0 after reset and before remap if the BMS is tied high during reset.
The AT91SAM9261 integrates a USB Host Port Open Host Controller Interface (OHCI). The reg-
isters of this interface are directly accessible on the AHB Bus and are mapped like a standard
internal memory at address 0x0050 0000.
The AT91SAM9261 integrates an LCD Controller. The interface is directly accessible on the
AHB Bus and is mapped like a standard internal memory at address 0x0060 0000.
Configuration Examples and Related 16 Kbyte Block Assignments
ITCM = 0 Kbyte
DTCM = 0 Kbyte
AHB = 160 Kbytes
RB9
RB8
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
illustrates different configurations and the related 16 Kbyte blocks (RB0 to RB9)
(1)
ITCM = 64 Kbytes
DTCM = 64 Kbytes
AHB = 32 Kbytes
RB3
RB2
RB1
RB0
RB7
RB6
RB5
RB4
RB9
RB8
AT91SAM9261 Preliminary
ITCM = 32 Kbytes
DTCM = 64 Kbytes
AHB = 64 Kbytes
RB3
RB2
RB7
RB6
RB5
RB4
RB9
RB8
RB1
RB0
RB9
RB8
RB4
RB1
RB0
ITCM = 32 Kbytes
DTCM = 16 Kbytes
AHB = 112 Kbytes
RB3
RB2
RB7
RB6
RB5
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