PIC18F6585-I/PT Microchip Technology, PIC18F6585-I/PT Datasheet - Page 6

• Manufacturer Part Number: PIC18F6585-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6585-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/AUSART/CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18FXX80/XX85
In addition to the code memory space, there are three
blocks in the configuration and ID space that are acces-
sible to the user through table reads and table writes.
Their locations in the memory map are shown in
Figure 2-5.
Users may store identification information (ID) in eight
ID registers. These ID registers are mapped in
addresses 200000h through 200007h. The ID locations
read out normally even after code protection is applied.
Locations, 300000h through 30000Dh, are reserved for
the Configuration bits. These bits select various device
options and are described in Section 5.0 “Configura-
tion Word”. These Configuration bits read out
normally even after code protection.
Locations, 3FFFFEh and 3FFFFFh, are reserved for
the device ID bits. These bits may be used by the
programmer to identify what device type is being
FIGURE 2-5:
DS39606E-page 6
2FFFFFh
Note:
000000h
00FFFFh
00BFFFh
1FFFFFh
3FFFFFh
or
Sizes of memory areas are not shown to scale.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
CONFIGURATION AND ID LOCATIONS FOR PIC18FXX80/XX85 DEVICES
programmed and are described in Section 5.0
“Configuration Word”. These device ID bits read out
normally even after code protection.
2.3.1
Memory in the address space, 000000h to 3FFFFFh, is
addressed via the Table Pointer which is comprised of
three pointer registers:
• TBLPTRU, at RAM address 0FF8h
• TBLPTRH, at RAM address 0FF7h
• TBLPTRL, at RAM address 0FF6h
The 4-bit command, ‘0000’ (core Instruction), is used
to load the Table Pointer prior to using many read or
write operations.
Addr[21:16]
TBLPTRU
MEMORY ADDRESS POINTER
Addr[15:8]
ID Location 1
ID Location 2
ID Location 3
ID Location 4
ID Location 5
ID Location 6
ID Location 7
ID Location 8
TBLPTRH
CONFIG1H
CONFIG2H
CONFIG3H
CONFIG4H
CONFIG5H
CONFIG6H
CONFIG7H
CONFIG1L
CONFIG2L
CONFIG3L
CONFIG4L
CONFIG5L
CONFIG6L
CONFIG7L
Device ID1
Device ID2
 2010 Microchip Technology Inc.
3FFFFEh
3FFFFFh
30000Ah
30000Bh
30000Ch
30000Dh
200000h
200001h
200002h
200003h
200004h
200005h
200006h
200007h
300000h
300001h
300002h
300003h
300004h
300005h
300006h
300007h
300008h
300009h
TBLPTRL
Addr[7:0]