PIC18LF442-I/ML Microchip Technology, PIC18LF442-I/ML Datasheet - Page 249
![IC MCU FLASH 8KX16 EE A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF442-I/ML
Manufacturer Part Number
PIC18LF442-I/ML
Description
IC MCU FLASH 8KX16 EE A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16LF627A-IP.pdf
(8 pages)
3.PIC18F242-ISO.pdf
(332 pages)
4.PIC18F242-ISO.pdf
(14 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(16 pages)
7.PIC18F242-ISO.pdf
(14 pages)
8.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18LF442-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC16LF627A-IP PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18F242-ISO PDF datasheet #7
- PIC18LF242-ISO PDF datasheet #8
- Current page: 249 of 332
- Download datasheet (6Mb)
SUBLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
© 2006 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
W
C
W
C
Z
N
W
C
W
C
Z
N
W
C
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
literal 'k'
[ label ] SUBLW k
0
k – (W)
N, OV, C, DC, Z
W is subtracted from the eight-bit
literal 'k'. The result is placed
in W.
1
1
SUBLW
SUBLW
SUBLW
Subtract W from literal
Read
Q2
0000
1
?
1
1
0
0
2
?
0
1
1
0
3
?
FF ; (2’s complement)
0
0
1
k
; result is negative
; result is positive
; result is zero
255
0x02
0x02
0x02
1000
W
Process
Data
Q3
kkkk
Write to W
Q4
kkkk
SUBWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register 'f'
Subtract W from f
[ label ] SUBWF
0
d
a
(f) – (W)
N, OV, C, DC, Z
Subtract W from register 'f' (2’s
complement method). If 'd' is 0,
the result is stored in W. If 'd' is 1,
the result is stored back in regis-
ter 'f' (default). If ’a’ is 0, the
Access Bank will be selected,
overriding the BSR value. If ’a’ is
1, then the bank will be selected
as per the BSR value (default).
1
1
SUBWF
SUBWF
SUBWF
Read
Q2
0101
3
2
?
1
2
1
0
0
2
2
?
2
0
1
1
0
1
2
?
FFh ;(2’s complement)
2
0
0
1
f
[0,1]
[0,1]
PIC18FXX2
; result is positive
; result is zero
; result is negative
255
REG, 1, 0
REG, 0, 0
REG, 1, 0
11da
dest
Process
Data
Q3
DS39564C-page 247
ffff
f [,d [,a]
destination
Write to
Q4
ffff
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