PIC18LF442-I/ML Microchip Technology, PIC18LF442-I/ML Datasheet - Page 101
![IC MCU FLASH 8KX16 EE A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF442-I/ML
Manufacturer Part Number
PIC18LF442-I/ML
Description
IC MCU FLASH 8KX16 EE A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16LF627A-IP.pdf
(8 pages)
3.PIC18F242-ISO.pdf
(332 pages)
4.PIC18F242-ISO.pdf
(14 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(16 pages)
7.PIC18F242-ISO.pdf
(14 pages)
8.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18LF442-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC16LF627A-IP PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18F242-ISO PDF datasheet #7
- PIC18LF242-ISO PDF datasheet #8
- Current page: 101 of 332
- Download datasheet (6Mb)
TABLE 9-9:
TABLE 9-10:
© 2006 Microchip Technology Inc.
PORTE
LATE
TRISE
ADCON1
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTE.
Legend: ST = Schmitt Trigger input, TTL = TTL input
RE1/WR/AN6
Name
RE0/RD/AN5
RE2/CS/AN7
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
Name
ADFM
Bit 7
IBF
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
PORTE FUNCTIONS
ADCS2
Bit 6
OBF
Bit#
bit0
bit1
bit2
—
—
IBOV
Bit 5
Buffer Type
—
—
—
ST/TTL
ST/TTL
ST/TTL
PSPMODE
(1)
(1)
(1)
Bit 4
—
—
—
Input/output port pin or read control input in Parallel Slave Port mode
or analog input:
RD
1 = Not a read operation
0 = Read operation. Reads PORTD register (if chip selected).
Input/output port pin or write control input in Parallel Slave Port mode
or analog input:
WR
1 = Not a write operation
0 = Write operation. Writes PORTD register (if chip selected).
Input/output port pin or chip select control input in Parallel Slave Port
mode or analog input:
CS
1 = Device is not selected
0 = Device is selected
PCFG3
Bit 3
—
—
—
LATE Data Output Register
PORTE Data Direction bits
PCFG2
Bit 2
RE2
PCFG1
Bit 1
RE1
Function
PCFG0
Bit 0
RE0
PIC18FXX2
---- -000
---- -xxx
0000 -111
00-- 0000
POR, BOR
Value on
DS39564C-page 99
---- -000
---- -uuu
0000 -111
00-- 0000
All Other
Value on
RESETS
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