ATMEGA645V-8AU Atmel, ATMEGA645V-8AU Datasheet - Page 233

• Manufacturer Part Number: ATMEGA645V-8AU
• Description: IC AVR MCU FLASH 64K 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA645V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, UART, USI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 54
• Eeprom Memory Size: 2KB
• Ram Memory Size: 4KB
• Cpu Speed: 8MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Data Rom Size: 2 KB
• Height: 1 mm
• Length: 14 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 14 mm
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.6.5
2570M–AVR–04/11
Scanning the ADC
Table 24-4.
Figure 24-9
Boundary-scan cell from
used for pure connectivity testing, since all analog inputs are shared with a digital port pin as
well.
Figure 24-9. Analog to Digital Converter
The signals are described briefly in
Signal
Name
AC_IDLE
ACO
ACME
ACBG
NEGSEL_2
NEGSEL_1
NEGSEL_0
MUXEN_7
MUXEN_6
MUXEN_5
MUXEN_4
MUXEN_3
MUXEN_2
MUXEN_1
MUXEN_0
EXTCH
ADC_7
ADC_6
ADC_5
ADC_4
ADC_3
ADC_2
ADC_1
ADC_0
ADC_2
ADC_0
shows a block diagram of the ADC with all relevant control and observe signals. The
ADC_1
Direction as
Seen from the
Comparator
Boundary-scan Signals for the Analog Comparator
output
input
input
input
SCTEST
AMPEN
ACLK
ST
Figure 24-5
To Comparator
Description
Turns off Analog
Comparator when
true
Analog
Comparator Output
Uses output signal
from ADC mux
when true
Bandgap
Reference enable
+
-
1x
Table
ADCBGEN
is attached to each of these signals. The ADC need not be
VCCREN
IREFEN
AREF
24-5.
PASSEN
ATmega325/3250/645/6450
ACTEN
1.22V
GNDEN
ref
Recommended
Input when Not
in Use
Will become
input to µC code
being executed
1.11V
ref
1
0
0
PRECH
DAC_9..0
ADCEN
HOLD
Output Values when
Recommended
Inputs are Used
Depends upon µC
code being executed
Depends upon µC
code being executed
Depends upon µC
code being executed
PRECH
AREF
10-bit DAC
0
AREF
+
-
DACOUT
COMP
COMP
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