ATMEGA645V-8AU Atmel, ATMEGA645V-8AU Datasheet - Page 168
ATMEGA645V-8AU
Manufacturer Part Number
ATMEGA645V-8AU
Description
IC AVR MCU FLASH 64K 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA325-16MU.pdf
(362 pages)
Specifications of ATMEGA645V-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, UART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
54
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
8MHz
No. Of Timers
3
Rohs Compliant
Yes
Data Rom Size
2 KB
Height
1 mm
Length
14 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
14 mm
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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19.7.2
2570M–AVR–04/11
Receiving Frames with 9 Data Bits
The following code example shows a simple USART receive function based on polling of the
Receive Complete (RXCn) Flag. When using frames with less than eight bits the most significant
bits of the data read from the UDRn will be masked to zero. The USART has to be initialized
before the function can be used.
Note:
The function simply waits for data to be present in the receive buffer by checking the RXCn Flag,
before reading the buffer and returning the value.
If 9-bit characters are used (UCSZ=7) the ninth bit must be read from the RXB8n bit in UCSRnB
before reading the low bits from the UDRn. This rule applies to the FEn, DORn and UPEn Sta-
tus Flags as well. Read status from UCSRnA, then data from UDRn. Reading the UDRn I/O
location will change the state of the receive buffer FIFO and consequently the TXB8n, FEn,
DORn and UPEn bits, which all are stored in the FIFO, will change.
Assembly Code Example
C Code Example
USART_Receive:
unsigned char USART_Receive( void )
{
}
; Wait for data to be received
sbis UCSR0A, RXC0
rjmp USART_Receive
; Get and return received data from buffer
in
ret
/* Wait for data to be received */
while ( !(UCSR0A & (1<<RXC0)) )
/* Get and return received data from buffer */
return UDR0;
1. See
r16, UDR0
;
“About Code Examples” on page
(1)
(1)
ATmega325/3250/645/6450
9.
168
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