PIC18LF248-I/SO Microchip Technology, PIC18LF248-I/SO Datasheet - Page 354
![IC MCU CAN FLASH 8K 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18LF248-I/SO
Manufacturer Part Number
PIC18LF248-I/SO
Description
IC MCU CAN FLASH 8K 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18LF242-ISO.pdf
(36 pages)
3.PIC18F248-ISO.pdf
(402 pages)
4.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18LF248-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18LF242-ISO PDF datasheet #2
- PIC18F248-ISO PDF datasheet #3
- PIC18F248-ISO PDF datasheet #4
- Current page: 354 of 402
- Download datasheet (7Mb)
FIGURE 27-16:
TABLE 27-16: EXAMPLE SPI™ SLAVE MODE REQUIREMENTS (CKE = 1)
DS41159E-page 352
PIC18FXX8
Param
70
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1:
No.
Note: Refer to Figure 27-5 for load conditions.
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
SDO
SDI
2:
TssL2scH,
TssL2scL
TscH
TscL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ SS
TscR
TscF
TscH2doV,
TscL2doV
TssL2doV SDO Data Output Valid after SS
TscH2ssH,
TscL2ssH
B
Symbol
2
Requires the use of parameter #73A.
Only if parameter #71A and #72A are used.
B
SS
SCK Input High Time
(Slave mode)
SCK Input Low Time
(Slave mode)
Last Clock Edge of Byte 1 to the 1st Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time
(Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK
Edge
Edge
SS
82
EXAMPLE SPI™ SLAVE MODE TIMING (CKE = 1)
70
to SCK
to SDO Output High-Impedance
after SCK Edge
MSb In
MSb
71
74
or SCK
75, 76
Characteristic
72
Input
Bit 6 - - - - - -1
Bit 6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC18FXX8
PIC18LFXX8
PIC18FXX8
PIC18LFXX8
PIC18FXX8
PIC18LFXX8
PIC18FXX8
PIC18LFXX8
80
LSb In
LSb
1.25 T
1.25 T
1.5 T
Min
100
T
CY
10
CY
40
40
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
© 2006 Microchip Technology Inc.
77
Max Units Conditions
100
100
25
45
25
50
25
45
25
50
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
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