PIC18LF248-I/SO Microchip Technology, PIC18LF248-I/SO Datasheet - Page 228
![IC MCU CAN FLASH 8K 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18LF248-I/SO
Manufacturer Part Number
PIC18LF248-I/SO
Description
IC MCU CAN FLASH 8K 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18LF242-ISO.pdf
(36 pages)
3.PIC18F248-ISO.pdf
(402 pages)
4.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18LF248-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18LF242-ISO PDF datasheet #2
- PIC18F248-ISO PDF datasheet #3
- PIC18F248-ISO PDF datasheet #4
- Current page: 228 of 402
- Download datasheet (7Mb)
19.3
The PIC18FXX8 has six main modes of operation:
• Configuration mode
• Disable mode
• Normal Operation mode
• Listen Only mode
• Loopback mode
• Error Recognition mode
All modes, except Error Recognition, are requested by
setting the REQOP bits (CANCON<7:5>); Error Recog-
nition is requested through the RXM bits of the Receive
Buffer register(s). Entry into a mode is Acknowledged
by monitoring the OPMODE bits.
When changing modes, the mode will not actually
change until all pending message transmissions are
complete. Because of this, the user must verify that the
device has actually changed into the requested mode
before fUrther Operations Are Executed.
19.3.1
The CAN module has to be initialized before the
activation. This is only possible if the module is in the
Configuration mode. The Configuration mode is
requested by setting the REQOP2 bit. Only when the
OPMODE2 status bit has a high level can the initializa-
tion be performed. Afterwards, the Configuration
registers, the Acceptance Mask registers and the
Acceptance Filter registers can be written. The module
is activated by setting the REQOP control bits to zero.
The module will protect the user from accidentally
violating the CAN protocol through programming
errors. All registers which control the configuration of
the module can not be modified while the module is on-
line. The CAN module will not be allowed to enter the
Configuration mode while a transmission is taking
place. The CONFIG bit serves as a lock to protect the
following registers.
• Configuration registers
• Bus Timing registers
• Identifier Acceptance Filter registers
• Identifier Acceptance Mask registers
In the Configuration mode, the module will not transmit
or receive. The error counters are cleared and the
interrupt flags remain unchanged. The programmer will
have access to Configuration registers that are access
restricted in other modes.
DS41159E-page 226
PIC18FXX8
CAN Modes of Operation
CONFIGURATION MODE
19.3.2
In Disable mode, the module will not transmit or
receive. The module has the ability to set the WAKIF bit
due to bus activity, however, any pending interrupts will
remain and the error counters will retain their value.
If REQOP<2:0> is set to ‘001’, the module will enter the
Module Disable mode. This mode is similar to disabling
other peripheral modules by turning off the module
enables. This causes the module internal clock to stop
unless the module is active (i.e., receiving or transmit-
ting a message). If the module is active, the module will
wait for 11 recessive bits on the CAN bus, detect that
condition as an IDLE bus, then accept the module
disable command. OPMODE<2:0> = 001 indicates
whether the module successfully went into Module
Disable mode.
The WAKIF interrupt is the only module interrupt that is
still active in the Module Disable mode. If the WAKIE is
set, the processor will receive an interrupt whenever
the CAN bus detects a dominant state, as occurs with
a SOF. If the processor receives an interrupt while it is
sleeping, more than one message may get lost. User
firmware must anticipate this condition and request
retransmission. If the processor is running while it
receives an interrupt, only the first message may get
lost.
The I/O pins will revert to normal I/O function when the
module is in the Module Disable mode.
19.3.3
This is the standard operating mode of the PIC18FXX8.
In this mode, the device actively monitors all bus
messages and generates Acknowledge bits, error
frames, etc. This is also the only mode in which the
PIC18FXX8 will transmit messages over the CAN bus.
19.3.4
Listen Only mode provides a means for the
PIC18FXX8 to receive all messages, including
messages with errors. This mode can be used for bus
monitor applications or for detecting the baud rate in
‘hot plugging’ situations. For auto-baud detection, it is
necessary that there are at least two other nodes which
are communicating with each other. The baud rate can
be detected empirically by testing different values until
valid messages are received. The Listen Only mode is
a silent mode, meaning no messages will be trans-
mitted while in this state, including error flags or
Acknowledge signals. The filters and masks can be
used to allow only particular messages to be loaded
into the receive registers, or the filter masks can be set
to all zeros to allow a message with any identifier to
pass. The error counters are reset and deactivated in
this state. The Listen Only mode is activated by setting
the mode request bits in the CANCON register.
DISABLE MODE
NORMAL MODE
LISTEN ONLY MODE
© 2006 Microchip Technology Inc.
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