AT89C51CC03C-S3RIM Atmel, AT89C51CC03C-S3RIM Datasheet - Page 50

• Manufacturer Part Number: AT89C51CC03C-S3RIM
• Description: IC 8051 MCU FLASH 64K 52PLCC
• Manufacturer: Atmel
• Series: AT89C CANr

Specifications of AT89C51CC03C-S3RIM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AT89C51CC03CS3RTR

Programming the Flash Spaces
User
Extra Row
50
AT89C51CC03
Figure 25. Column Latches Loading Procedure
Note:
The following procedure is used to program the User space and is summarized in
Figure 26:
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The following procedure is used to program the Extra Row space and is summarized in
Figure 26:
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Load up to one page of data in the column latches from address 0000h to FFFFh.
Save and Disable the interrupts.
Launch the programming by writing the data sequence 50h followed by A0h in
FCON register (only from FM1).
The end of the programming indicated by the FBUSY flag cleared.
Restore the interrupts.
Load data in the column latches from address FF80h to FFFFh.
Save and Disable the interrupts.
Launch the programming by writing the data sequence 52h followed by A2h in
FCON register (only from FM1).
The end of the programming indicated by the FBUSY flag cleared.
Restore the interrupts.
The last page address used when loading the column latch is the one used to select the
page programming address.
Column Latches Mapping
Exec: MOVX @DPTR, A
Data memory Mapping
FCON = 00h (FPS = 0)
FCON = 08h (FPS=1)
Column Latches
Save and Disable IT
DPTR = Address
ACC = Data
Last Byte
Data Load
to load?
Restore IT
Loading
EA = 0
4182O–CAN–09/08