AT89C51CC03C-S3RIM Atmel, AT89C51CC03C-S3RIM Datasheet - Page 143

IC 8051 MCU FLASH 64K 52PLCC

AT89C51CC03C-S3RIM

Manufacturer Part Number
AT89C51CC03C-S3RIM
Description
IC 8051 MCU FLASH 64K 52PLCC
Manufacturer
Atmel
Series
AT89C CANr

Specifications of AT89C51CC03C-S3RIM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT89C51CC03CS3RTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51CC03C-S3RIM
Manufacturer:
Atmel
Quantity:
10 000
PCA Interrupt
Figure 68. PCA Interrupt System
PCA Capture Mode
4182O–CAN–09/08
PCA Timer/Counter
Module 0
Module 1
Module 2
Module 3
Module 4
CMOD.0
Each module in the PCA has a special function register associated with it (CCAPM0 for
module 0 ...). The CCAPM0:4 registers contain the bits that control the mode that each
module will operate in.
ECF
To use one of the PCA modules in capture mode either one or both of the CCAPM bits
CAPN and CAPP for that module must be set. The external CEX input for the module
(on port 1) is sampled for a transition. When a valid transition occurs the PCA hardware
loads the value of the PCA counter registers (CH and CL) into the module’s capture reg-
isters (CCAPnL and CCAPnH). If the CCFn bit for the module in the CCON SFR and the
ECCFn bit in the CCAPMn SFR are set then an interrupt will be generated.
The ECCF bit enables the CCF flag in the CCON register to generate an interrupt
when a match or compare occurs in the associated module.
The PWM bit enables the pulse width modulation mode.
The TOG bit when set causes the CEX output associated with the module to toggle
when there is a match between the PCA counter and the module’s capture/compare
register.
The match bit MAT when set will cause the CCFn bit in the CCON register to be set
when there is a match between the PCA counter and the module’s capture/compare
register.
The two bits CAPN and CAPP in CCAPMn register determine the edge that a
capture input will be active on. The CAPN bit enables the negative edge, and the
CAPP bit enables the positive edge. If both bits are set both edges will be enabled.
The bit ECOM in CCAPM register when set enables the comparator function.
CF
CCAPMn.0
ECCFn
CR
CCF4 CCF3 CCF2 CCF1 CCF0
IEN0.6
EC
IEN0.7
EA
AT89C51CC03
CCON
To Interrupt
143

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