PIC18LF4525-I/ML Microchip Technology, PIC18LF4525-I/ML Datasheet - Page 407

• Manufacturer Part Number: PIC18LF4525-I/ML
• Description: IC MCU FLASH 24KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4525-I/ML

• Core Size: 8-Bit
• Program Memory Size: 48KB (24K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3968Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

© 2008 Microchip Technology Inc.
First Start Bit Timing ................................................ 189
Full-Bridge PWM Output .......................................... 153
Half-Bridge PWM Output ......................................... 152
High/Low-Voltage Detect Characteristics ................ 339
High-Voltage Detect Operation (VDIRMAG = 1) ...... 246
I
I
I
I
I
I
I
I
I
I
I
I
Low-Voltage Detect Operation (VDIRMAG = 0) ...... 245
Master SSP I
Master SSP I
Parallel Slave Port (PIC18F4525/4620) ................... 348
Parallel Slave Port (PSP) Read ............................... 107
Parallel Slave Port (PSP) Write ............................... 107
PWM Auto-Shutdown (PRSEN = 0,
PWM Auto-Shutdown (PRSEN = 1,
PWM Direction Change ........................................... 155
PWM Direction Change at Near
PWM Output ............................................................ 144
Repeat Start Condition ............................................. 190
Reset, Watchdog Timer (WDT), Oscillator Start-up
Send Break Character Sequence ............................ 216
Slave Synchronization ............................................. 167
Slow Rise Time (MCLR Tied to V
SPI Mode (Master Mode) ......................................... 166
SPI Mode (Slave Mode, CKE = 0) ........................... 168
SPI Mode (Slave Mode, CKE = 1) ........................... 168
Synchronous Reception (Master Mode, SREN) ...... 219
Synchronous Transmission ...................................... 217
Synchronous Transmission (Through TXEN) .......... 218
Time-out Sequence on POR w/PLL Enabled
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timer0 and Timer1 External Clock .......................... 346
Transition for Entry to Idle Mode ................................ 38
Transition for Entry to SEC_RUN Mode .................... 35
Transition for Entry to Sleep Mode ............................ 37
Transition for Two-Speed Start-up
Transition for Wake from Idle to Run Mode ............... 38
Transition for Wake from Sleep (HSPLL) ................... 37
Transition from RC_RUN Mode to
Transition from SEC_RUN Mode to
2
2
2
2
2
2
2
2
2
2
2
2
C Bus Data ............................................................ 354
C Bus Start/Stop Bits ............................................. 354
C Master Mode (7 or 10-Bit Transmission) ........... 192
C Master Mode (7-Bit Reception) .......................... 193
C Slave Mode (10-Bit Reception, SEN = 0) .......... 178
C Slave Mode (10-Bit Reception, SEN = 1) .......... 183
C Slave Mode (10-Bit Transmission) ..................... 179
C Slave Mode (7-Bit Reception, SEN = 0) ............ 176
C Slave Mode (7-Bit Reception, SEN = 1) ............ 182
C Slave Mode (7-Bit Transmission) ....................... 177
C Slave Mode General Call Address
C Stop Condition Receive or Transmit Mode ........ 194
Sequence (7 or 10-Bit Address Mode) ............ 184
Auto-Restart Disabled) .................................... 158
Auto-Restart Enabled) ..................................... 158
100% Duty Cycle ............................................. 155
Timer (OST), Power-up Timer (PWRT) ........... 345
V
(MCLR Tied to V
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
(INTOSC to HSPLL) ........................................ 260
PRI_RUN Mode ................................................. 36
PRI_RUN Mode (HSPLL) .................................. 35
DD
Rise > T
2
2
C Bus Data ........................................ 356
C Bus Start/Stop Bits ........................ 356
PWRT
DD
DD
) ............................................ 47
) ........................................... 47
, V
DD
DD
DD
, Case 1) ....................... 46
, Case 2) ....................... 46
Rise < T
DD
,
PWRT
) ........... 46
PIC18F2525/2620/4525/4620
Timing Diagrams and Specifications ............................... 342
Top-of-Stack Access .......................................................... 54
TRISE Register
TSTFSZ ........................................................................... 307
Two-Speed Start-up ................................................. 249, 260
Two-Word Instructions
TXSTA Register
V
Voltage Reference Specifications .................................... 338
W
Watchdog Timer (WDT) ........................................... 249, 258
WCOL ...................................................... 189, 190, 191, 194
WCOL Status Flag ................................... 189, 190, 191, 194
WWW Address ................................................................ 407
WWW, On-Line Support ...................................................... 5
X
XORLW ........................................................................... 307
XORWF ........................................................................... 308
Transition to RC_RUN Mode ..................................... 36
A/D Conversion Requirements ................................ 360
Capture/Compare/PWM (CCP) Requirements ........ 347
CLKO and I/O Requirements ................................... 344
EUSART Synchronous Receive Requirements ....... 359
EUSART Synchronous Transmission
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
External Clock Requirements .................................. 342
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements
PLL Clock ................................................................ 343
Reset, Watchdog Timer, Oscillator Start-up
Timer0 and Timer1 External Clock
PSPMODE Bit ......................................................... 100
Example Cases ......................................................... 58
BRGH Bit ................................................................. 205
Associated Registers ............................................... 259
Control Register ....................................................... 258
During Oscillator Failure .......................................... 261
Programming Considerations .................................. 258
2
C Bus Data Requirements (Slave Mode) .............. 355
Requirements .................................................. 358
(Master Mode, CKE = 0) .................................. 349
(Master Mode, CKE = 1) .................................. 350
(Slave Mode, CKE = 0) .................................... 352
(Slave Mode, CKE = 1) .................................... 353
Requirements .................................................. 356
(PIC18F4525/4620) ......................................... 348
Timer, Power-up Timer and Brown-out
Reset Requirements ........................................ 345
Requirements .................................................. 346
2
2
C Bus Data Requirements ................ 357
C Bus Start/Stop Bits
DS39626E-page 405