PIC18LF4525-I/ML Microchip Technology, PIC18LF4525-I/ML Datasheet - Page 20

• Manufacturer Part Number: PIC18LF4525-I/ML
• Description: IC MCU FLASH 24KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4525-I/ML

• Core Size: 8-Bit
• Program Memory Size: 48KB (24K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3968Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2525/2620/4525/4620
TABLE 1-3:
DS39626E-page 18
RB0/INT0/FLT0/AN12
RB1/INT1/AN10
RB2/INT2/AN8
RB3/AN9/CCP2
RB4/KBI0/AN11
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend: TTL = TTL compatible input
Note 1:
RB0
INT0
FLT0
AN12
RB1
INT1
AN10
RB2
INT2
AN8
RB3
AN9
CCP2
RB4
KBI0
AN11
RB5
KBI1
PGM
RB6
KBI2
PGC
RB7
KBI3
PGD
2:
3:
Pin Name
(1)
ST = Schmitt Trigger input with CMOS levels
O
Default assignment for CCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
For the QFN package, it is recommended that the bottom pad be connected to V
= Output
PIC18F4525/4620 PINOUT I/O DESCRIPTIONS (CONTINUED)
PDIP
33
34
35
36
37
38
39
40
Pin Number
QFN TQFP
10
12
14
15
16
17
11
9
10
14
15
16
17
11
8
9
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
Analog
Analog
Analog
Analog
Analog
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
CMOS = CMOS compatible input or output
I
P
PORTB is a bidirectional I/O port. PORTB can be
software programmed for internal weak pull-ups on all
inputs.
Digital I/O.
External interrupt 0.
PWM Fault input for Enhanced CCP1.
Analog input 12.
Digital I/O.
External interrupt 1.
Analog input 10.
Digital I/O.
External interrupt 2.
Analog input 8.
Digital I/O.
Analog input 9.
Capture 2 input/Compare 2 output/PWM2 output.
Digital I/O.
Interrupt-on-change pin.
Analog input 11.
Digital I/O.
Interrupt-on-change pin.
Low-Voltage ICSP™ Programming enable pin.
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming
clock pin.
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming
data pin.
= Input
= Power
Description
© 2008 Microchip Technology Inc.
SS
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