PIC18LF4525-I/ML Microchip Technology, PIC18LF4525-I/ML Datasheet - Page 138

• Manufacturer Part Number: PIC18LF4525-I/ML
• Description: IC MCU FLASH 24KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4525-I/ML

• Core Size: 8-Bit
• Program Memory Size: 48KB (24K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3968Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2525/2620/4525/4620
14.1
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
FIGURE 14-1:
FIGURE 14-2:
DS39626E-page 136
T1OSO/T13CKI
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T13CKI/T1OSO
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Timer3 Operation
T1OSI
T1OSI
CCP1/CCP2 Select from T3CON<6,3>
CCP1/CCP2 Select from T3CON<6,3>
CCP1/CCP2 Special Event Trigger
CCP1/CCP2 Special Event Trigger
Timer1 Oscillator
Timer1 Oscillator
T1OSCEN
T3CKPS1:T3CKPS0
T3SYNC
TMR3ON
TIMER3 BLOCK DIAGRAM
T1OSCEN
T3CKPS1:T3CKPS0
T3SYNC
TMR3ON
TIMER3 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
(1)
(1)
TMR3CS
TMR3CS
Internal
Clock
Clock
F
Internal
F
OSC
OSC
/4
/4
1
0
1
0
Timer1 Clock Input
Timer1 Clock Input
Clear TMR3
Clear TMR3
Prescaler
Prescaler
1, 2, 4, 8
1, 2, 4, 8
The operating mode is determined by the clock select
bit, TMR3CS (T3CON<1>). When TMR3CS is cleared
(= 0), Timer3 increments on every internal instruction
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
As with Timer1, the RC1/T1OSI and RC0/T1OSO/
T13CKI pins become inputs when the Timer1 oscillator
is enabled. This means the values of TRISC<1:0> are
ignored and the pins are read as ‘0’.
2
2
OSC
TMR3L
TMR3L
/4). When the bit is set, Timer3 increments
8
Synchronize
8
Synchronize
Sleep Input
Sleep Input
Detect
Detect
High Byte
High Byte
TMR3H
TMR3
TMR3
8
© 2008 Microchip Technology Inc.
8
8
Internal Data Bus
1
0
1
0
Read TMR1L
Write TMR1L
Set
TMR3IF
on Overflow
Set
TMR3IF
on Overflow
Timer3
On/Off
Timer3
On/Off