PIC18F4431-I/PT Microchip Technology, PIC18F4431-I/PT Datasheet - Page 386

• Manufacturer Part Number: PIC18F4431-I/PT
• Description: IC PIC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/I2C/SPI/SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
CKE bit ............................................................................. 212
CKP bit ............................................................................. 213
Clock Sources .................................................................... 26
Clocking Scheme/Instruction Cycle .................................... 61
CLRF ................................................................................ 303
CLRWDT .......................................................................... 303
Code Examples
Code Protection ....................................................... 267, 283
COMF ............................................................................... 304
Compare (CCP Module) ................................................... 154
Computed GOTO ............................................................... 63
Configuration Bits ............................................................. 267
Configuration Register Protection .................................... 286
Context Saving During Interrupts ..................................... 106
Control Registers
Conversion Considerations .............................................. 380
CPFSEQ .......................................................................... 304
CPFSGT ........................................................................... 305
CPFSLT ........................................................................... 305
Crystal Oscillator/Ceramic Resonator ................................ 21
D
D/A Bit .............................................................................. 212
Data EEPROM Code Protection ...................................... 286
Data EEPROM Memory ..................................................... 85
DS39616B-page 384
CCP2 ........................................................................ 152
Compare Mode. See Compare.
PWM Mode. See PWM.
Timer Resources ...................................................... 152
Selection Using OSCCON Register ........................... 26
16 x 16 Signed Multiply Routine ................................. 90
16 x 16 Unsigned Multiply Routine ............................. 90
8 x 8 Signed Multiply Routine ..................................... 89
8 x 8 Unsigned Multiply Routine ................................. 89
Changing Between Capture Prescalers ................... 153
Computed GOTO Using an Offset Value ................... 63
Data EEPROM Read ................................................. 87
Data EEPROM Refresh Routine ................................ 88
Data EEPROM Write .................................................. 87
Erasing a Flash Program Memory Row ..................... 80
Fast Register Stack .................................................... 60
How to Clear RAM (Bank 1) Using Indirect
Implementing a Real-Time Clock Using a
Initializing PORTA .................................................... 107
Initializing PORTB .................................................... 112
Initializing PORTC .................................................... 118
Initializing PORTD .................................................... 124
Initializing PORTE .................................................... 129
Reading a Flash Program Memory Word ................... 79
Saving Status, WREG and
Writing to Flash Program Memory ....................... 82–83
Associated Registers ............................................... 155
CCP Pin Configuration ............................................. 154
CCPR1 Register ....................................................... 154
Software Interrupt ..................................................... 154
Special Event Trigger ............................................... 154
Timer1 Mode Selection ............................................ 154
EECON1 and EECON2 .............................................. 76
Associated Registers ................................................. 88
EEADR Register ........................................................ 85
EECON1 and EECON2 Registers ............................. 85
CCPR2H Register ............................................ 152
CCPR2L Register ............................................ 152
Addressing ......................................................... 71
Timer1 Interrupt Service .................................. 141
BSR Registers in RAM ..................................... 106
Data Memory ..................................................................... 63
Data/Address Bit (D/A) ..................................................... 212
DAW ................................................................................ 306
DC and AC Characteristics
DC Characteristics ............................................339, 340, 349
DCFSNZ .......................................................................... 307
DECF ............................................................................... 306
DECFSZ .......................................................................... 307
Demonstration Boards
Development Support ...................................................... 331
Device Differences ........................................................... 379
Device Overview .................................................................. 7
Direct Addressing ............................................................... 72
E
Effects of Power Managed Modes on Various
Electrical Characteristics .................................................. 337
Enhanced Universal Synchronous Asynchronous
Equations
Errata ................................................................................... 6
Evaluation and Programming Tools ................................. 335
External Clock Input ........................................................... 23
F
Fail-Safe Clock Monitor .............................................267, 281
Fast Register Stack ............................................................ 60
Firmware Instructions ....................................................... 287
Flash Program Memory ..................................................... 75
Operation During Code-Protect ................................. 88
Protection Against Spurious Write ............................. 87
Reading ..................................................................... 87
Using .......................................................................... 88
Write Verify ................................................................ 87
Writing ........................................................................ 87
General Purpose Registers ....................................... 63
Map for PIC18F2X31/4X31 ........................................ 64
Special Function Registers ........................................ 65
Graphs and Tables (Preliminary) ............................. 371
PICDEM 1 ................................................................ 334
PICDEM 17 .............................................................. 334
PICDEM 18R PIC18C601/801 ................................. 335
PICDEM 2 Plus ........................................................ 334
PICDEM 3 PIC16C92X ............................................ 334
PICDEM 4 ................................................................ 334
PICDEM LIN PIC16C43X ........................................ 335
PICDEM USB PIC16C7X5 ...................................... 335
PICDEM.net Internet/Ethernet ................................. 334
Features (table) ........................................................... 9
New Core Features ...................................................... 7
Other Special Features ................................................ 8
Clock Sources ............................................................ 29
Receiver Transmitter (USART) ................................ 221
16 x 16 Signed Multiplication Algorithm ..................... 90
16 x 16 Unsigned Multiplication Algorithm ................. 90
A/D Acquisition Time ............................................... 253
A/D Minimum Charging Time ................................... 253
Interrupts in Power-Managed Modes ....................... 282
POR or Wake from Sleep ........................................ 282
WDT During Oscillator Failure ................................. 281
Associated Registers ................................................. 83
Control Registers ....................................................... 76
Erase Sequence ........................................................ 80
Erasing ....................................................................... 80
Operation During Code-Protect ................................. 83
Reading ..................................................................... 79
TABLAT Register ....................................................... 78
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