DSPIC33FJ64GP802-E/SO Microchip Technology, DSPIC33FJ64GP802-E/SO Datasheet - Page 344
![IC DSPIC MCU/DSP 64K 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
DSPIC33FJ64GP802-E/SO
Manufacturer Part Number
DSPIC33FJ64GP802-E/SO
Description
IC DSPIC MCU/DSP 64K 28-SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ64GP802-E/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b, D/A 4x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
3.3V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
21
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
10-chx10-bit|10-chx12-bit
On-chip Dac
2-chx16-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 344 of 402
- Download datasheet (3Mb)
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
TABLE 30-31: SPIx MODULE SLAVE MODE (CKE = 1) TIMING REQUIREMENTS
DS70292D-page 344
AC CHARACTERISTICS
SP70
SP71
SP72
SP73
SP30
SP31
SP35
SP40
SP41
SP50
SP51
SP52
SP60
Note 1:
Param
No.
2:
3:
4:
TscL
TscH
TscF
TscR
TdoF
TdoR
TscH2doV,
TscL2doV
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TssL2scH,
TssL2scL
TssH2doZ SSx to SDO
TscH2ssH
TscL2ssH
TssL2doV SDOx Data Output Valid after
Symbol
These parameters are characterized but not tested in manufacturing.
Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.
The minimum clock period for SCKx is 100 ns. The clock generated in Master mode must not violate this
specification.
Assumes 50 pF load on all SPIx pins.
SCKx Input Low Time
SCKx Input High Time
SCKx Input Fall Time
SCKx Input Rise Time
SDOx Data Output Fall Time
SDOx Data Output Rise Time
SDOx Data Output Valid after
SCKx Edge
Setup Time of SDIx Data Input
to SCKx Edge
Hold Time of SDIx Data Input
to SCKx Edge
SSx to SCKx or SCKx
Input
High-Impedance
SSx after SCKx Edge
SSx Edge
Characteristic
X
Output
(4)
(3)
(3)
(1)
(3)
Preliminary
(3)
1.5 T
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
Min
120
CY
30
30
20
20
10
—
—
—
—
—
—
+ 40
Typ
10
10
—
—
—
—
—
—
—
—
—
—
—
(2)
Max
—
—
25
25
—
—
30
—
—
—
50
—
50
-40°C T
-40°C T
2009 Microchip Technology Inc.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
A
A
+125°C for Extended
+85°C for Industrial
See Note 3
See Note 3
See parameter D032
and Note 3
See parameter D031
and Note 3
See Note 4
Conditions
—
—
—
—
—
—
—
—
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