DSPIC33FJ64GP802-E/SO Microchip Technology, DSPIC33FJ64GP802-E/SO Datasheet - Page 287
![IC DSPIC MCU/DSP 64K 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
DSPIC33FJ64GP802-E/SO
Manufacturer Part Number
DSPIC33FJ64GP802-E/SO
Description
IC DSPIC MCU/DSP 64K 28-SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ64GP802-E/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b, D/A 4x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
3.3V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
21
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
10-chx10-bit|10-chx12-bit
On-chip Dac
2-chx16-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 287 of 402
- Download datasheet (3Mb)
25.0
The programmable CRC generator offers the following
features:
• User-programmable polynomial CRC equation
• Interrupt output
• Data FIFO
FIGURE 25-1:
2009 Microchip Technology Inc.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
D
Note 1: This data sheet summarizes the features
PLEN<3:0>
OUT
XOR
2: Some registers and associated bits
PROGRAMMABLE CYCLIC
REDUNDANCY CHECK (CRC)
GENERATOR
of
dsPIC33FJ64GPX02/X04,
dsPIC33FJ128GPX02/X04 families of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to “Section 36. Programmable
Cyclic Redundancy Check (CRC)”
(DS70298) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is avail-
able
(www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
IN
p_clk
Hold
BIT 0
OUT
the
from
0
CRC SHIFTER DETAILS
the
dsPIC33FJ32GP302/304,
X1
0
1
Microchip
IN
p_clk
BIT 1
Hold
OUT
website
1
and
Preliminary
CRC Shift Register
X2
0
1
CRC Write Bus
25.1
The module implements a software configurable CRC
generator. The terms of the polynomial and its length
can be programmed using the CRCXOR (X<15:1>) bits
and the CRCCON (PLEN<3:0>) bits, respectively.
EQUATION 25-1:
To program this polynomial into the CRC generator,
the CRC register bits should be set as shown in
Table 25-1.
TABLE 25-1:
For the value of X<15:1>, the 12th bit and the 5th bit are
set to ‘1’, as required by the CRC equation. The 0th bit
required by the CRC equation is always XORed. For a
16-bit polynomial, the 16th bit is also always assumed
to be XORed; therefore, the X<15:1> bits do not have
the 0th bit or the 16th bit.
The topology of a standard CRC generator is shown in
Figure 25-2.
IN
p_clk
Hold
BIT 2
PLEN<3:0>
OUT
Bit Name
X<15:1>
2
Overview
CRC Read Bus
x
16
EXAMPLE CRC SETUP
X3
0
1
+
CRC EQUATION
x
12
X15
000100000010000
0
1
+
x
5
Bit Value
+
IN
BIT 15
1
1111
p_clk
Hold
DS70292D-page 287
OUT
15
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