ATMEGA165PV-8AU Atmel, ATMEGA165PV-8AU Datasheet - Page 262

• Manufacturer Part Number: ATMEGA165PV-8AU
• Description: IC AVR MCU 16K 8MHZ 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165PV-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 64TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Controller Family/series: AVR MEGA
• No. Of I/o's: 54
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.8.13
8019K–AVR–11/10
ATmega165P Boot Loader Parameters
In
Self-Programming are given.
Table 24-6.
Note:
Table 24-6
1
1
0
0
Return:
Do_spm:
Wait_spm:
Wait_ee:
sbiw loophi:looplo, 1
brne Rdloop
; return to RWW section
; verify that RWW section is safe to read
in
sbrs temp1, RWWSB
ret
; re-enable the RWW section
ldi
call Do_spm
rjmp Return
; check for previous SPM complete
in
sbrc temp1, SPMEN
rjmp Wait_spm
; input: spmcrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
sbic EECR, EEWE
rjmp Wait_ee
; SPM timed sequence
out
spm
; restore SREG (to enable interrupts if originally enabled)
out
ret
1. The different BOOTSZ Fuse configurations are shown in
temp1, SPMCSR
spmcrval, (1<<RWWSRE) | (1<<SPMEN)
temp1, SPMCSR
temp2, SREG
SPMCSR, spmcrval
SREG, temp2
1
0
1
0
through
Boot Size Configuration
words
words
words
words
1024
128
256
512
Table 24-8 on page
16
2
4
8
; If RWWSB is set, the RWW section is not ready yet
Application Flash
Section
0x0000 - 0x1DFF
0x0000 - 0x1F7F
0x0000 - 0x1EFF
0x0000 - 0x1BFF
(1)
;use subi for PAGESIZEB<=256
263, the parameters used in the description of the
Boot Loader
Flash
Section
0x1E00 - 0x1FFF
0x1C00 - 0x1FFF
0x1F80 - 0x1FFF
0x1F00 - 0x1FFF
Figure 24-2 on page
End
Application
Section
ATmega165P
0x1EFF
0x1DFF
0x1BFF
0x1F7F
253.
Boot Reset
Address
(Start Boot
Loader
Section)
0x1F80
0x1F00
0x1E00
0x1C00
262