AT89C5122D-RDRUM Atmel, AT89C5122D-RDRUM Datasheet - Page 146

• Manufacturer Part Number: AT89C5122D-RDRUM
• Description: IC 8051 MCU 32K CRAM USB 64-VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C5122D-RDRUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SmartCard, SPI, UART/USART, USB
• Peripherals: LED, POR, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: AT89C5122D-RDRUMTR

Mode 0 (13-bit Timer)
Mode 1 (16-bit Timer)
146
AT83R5122, AT8xC5122/23
INTx#
CK_Tx
Tx
TMOD reg
GATEx
/6
For normal Timer operation (GATE0= 0), setting TR0 allows TL0 to be incremented by
the selected input. Setting GATE0 and TR0 allows external pin INT0# to control Timer
operation.
Timer 0 overflow (count rolls over from all 1s to all 0s) sets the TF0 flag and generates
an interrupt request.
It is important to stop the Timer/Counter before changing modes.
Mode 0 configures Timer 0 as a 13-bit Timer which is set up as an 8-bit Timer (TH0 reg-
ister) with a modulo-32 prescaler implemented with the lower five bits of the TL0 register
(see Figure 89). The upper three bits of the TL0 register are indeterminate and should
be ignored. Prescaler overflow increments the TH0 register.
Figure 90 gives the overflow period calculation formula.
Figure 89. Timer/Counter x (x= 0 or 1) in Mode 0
Figure 90. Mode 0 Overflow Period Formula
Mode 1 configures Timer 0 as a 16-bit Timer with the TH0 and TL0 registers connected
in a cascade (see Figure 91). The selected input increments the TL0 register.
Figure 92 gives the overflow period calculation formula when in timer mode.
TFx
PER
TMOD reg
C/Tx#
=
0
1
TCON reg
6
TRx
(16384 – (THx, TLx))
F
CK_Tx
(8 bits)
THx
(5 bits)
TLx
Overflow
TCON reg
TFx
4202F–SCR–07/2008
Timer x
Interrupt
Request