AT89C5122D-RDRUM Atmel, AT89C5122D-RDRUM Datasheet - Page 142

• Manufacturer Part Number: AT89C5122D-RDRUM
• Description: IC 8051 MCU 32K CRAM USB 64-VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C5122D-RDRUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SmartCard, SPI, UART/USART, USB
• Peripherals: LED, POR, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: AT89C5122D-RDRUMTR

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AT83R5122, AT8xC5122/23
Table 85. Serial Peripheral Control Register - SPCON (C3h)
Reset Value = 00010100b
Number
SPR2
Bit
7
7
6
5
4
3
2
1
0
Mnemonic
SSDIS
MSTR
CPHA
SPEN
CPOL
SPR2
SPR1
SPR0
SPEN
Bit
6
Mode
R/W
RW
RW
RW
RW
RW
RW
RW
RW
SSDIS
5
Description
Serial Peripheral Rate 2
Bit with SPR1 and SPR0 define the clock rate
Serial Peripheral Enable
Clear to disable the SPI interface (internal reset of the SPI)
Set to enable the SPI interface
SS Disable
Clear to enable SS in both Master and Slave modes
Set to disable SS in both Master and Slave modes. In Slave mode, this
bit has no effect if CPHA = ’0’
Serial Peripheral Master
Clear to configure the SPI as a Slave
Set to configure the SPI as a Master
Clock Polarity
Clear to have the SCK set to ’0’ in idle state
Set to have the SCK set to ’1’ in idle low
Clock Phase
Clear to have the data sampled when the SPSCK leaves the idle state
(see CPOL)
Set to have the data sampled when the SPSCK returns to idle state
(see CPOL)
Serial Peripheral Rate (SPR2:SPR1:SPR0)
000: Reserved
001: F
010: F
011: F
100: F
101: F
110: F
111: Reserved
CK_SPI
CK_SPI
CK_SPI
CK_SPI
CK_SPI
CK_SPI
MSTR
4
/16
/128
/8
/32
/64
/4
CPOL
3
CPHA
2
SPR1
1
4202F–SCR–07/2008
SPR0
0