AT89C5122D-RDRUM Atmel, AT89C5122D-RDRUM Datasheet - Page 118

• Manufacturer Part Number: AT89C5122D-RDRUM
• Description: IC 8051 MCU 32K CRAM USB 64-VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C5122D-RDRUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SmartCard, SPI, UART/USART, USB
• Peripherals: LED, POR, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: AT89C5122D-RDRUMTR

Table 68. USB Endpoint Number - UEPNUM (S:C7h)
Table 69. USB Endpoint X Control Register - UEPCONX (S:D4h)
Reset Value = 1000 0000b when UEPNUM = 0
Reset Value = 0000 0000b otherwise
118
Bit Number
Bit Number
7 - 4
3 - 0
EPEN
1-0
7
7
7
6
5
4
3
2
-
AT83R5122, AT8xC5122/23
Bit Mnemonic
EPNUM[3:0]
Bit Mnemonic
EPTYPE[1:0]
NAKIEN
NAKOUT
NAKIEN
-
NAKIN
EPDIR
EPEN
DTGL
6
6
-
Description
Reserved
The value read from these bits is always 0. Do not change these bits.
Endpoint Number
Set this field with the number of the endpoint which should be accessed when reading or writing to, USB Byte
Count Register X (X=EPNUM set in UEPNUM Register) - UBYCTX (S:E2h) or USB Endpoint X Control Register -
UEPCONX (S:D4h). This value can be 0, 1, 2, 3, 4, 5 or 6.
Description
Endpoint Enable
Set this bit to enable the endpoint according to the device configuration. Endpoint 0 will always be enabled after
a hardware or USB bus reset and participate in the device configuration.
Clear this bit to disable the endpoint according to the device configuration.
NAK Interrupt Enable
Set this bit to enable NAKIN and NAKOUT Interrupt.
Clear this bit to disable NAKIN and NAKOUT Interrupt.
NAK OUT Sent
This bit is set by hardware when the a NAK handshake is sent by the USB controller to an OUT request from
the Host. This generates an interrupt if the NAKIEN bit is set.
This bit shall be cleared by software.
NAK IN Sent
This bit is set by hardware when the a NAK handshake is sent by the USB controller to an IN request from the
Host. This generates an interrupt if the NAKIEN bit is set.
This bit shall be cleared by software.
Data Toggle (Read-only)
This bit is set by hardware when a valid DATA0 packet is received and accepted.
This bit is cleared by hardware when a valid DATA1 packet is received and accepted.
Endpoint Direction
Set this bit to configure IN direction for Bulk, Interrupt and Isochronous endpoints.
Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous endpoints.
This bit has no effect for Control endpoints.
Endpoint Type
Set this field according to the endpoint configuration (Endpoint 0 will always be configured as control):
00Control endpoint
01Isochronous endpoint
10Bulk endpoint
11Interrupt endpoint
Reset Value = 0000 0000b
NAKOUT
5
5
-
NAKIN
4
4
-
EPNUM3
DTGL
3
3
EPNUM2
EPDIR
2
2
EPTYPE1
EPNUM1
1
1
4202F–SCR–07/2008
EPTYPE0
EPNUM0
0
0