PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 53
![IC PIC MCU FLASH 128K 100TQFP](/photos/12/13/121328/pic24fj128ga010-i_pt_sml.jpg)
PIC24FJ128GA010-I/PT
Manufacturer Part Number
PIC24FJ128GA010-I/PT
Description
IC PIC MCU FLASH 128K 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ64GA006-IPT.pdf
(240 pages)
3.PIC24FJ64GA006-IPT.pdf
(22 pages)
4.PIC24FJ128GA008-IPT.pdf
(12 pages)
5.PIC24FJ128GA006-IPT.pdf
(231 pages)
6.PIC24FJ128GA010-IPT.pdf
(230 pages)
Specifications of PIC24FJ128GA010-I/PT
Core Size
16-Bit
Program Memory Size
128KB (43K x 24)
Core Processor
PIC
Speed
16MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Controller Family/series
PIC24
No. Of I/o's
84
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
5
Embedded Interface Type
EUART, I2C, PSP, SPI
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SPI, I2C, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Package
100TQFP
Device Core
PIC
Family Name
PIC24
Maximum Speed
16 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128GA010-I/PT
Manufacturer:
Microchi
Quantity:
627
Company:
Part Number:
PIC24FJ128GA010-I/PT
Manufacturer:
MICROCHIP
Quantity:
212
Company:
Part Number:
PIC24FJ128GA010-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
5.0
The Reset module combines all Reset sources and
controls the device Master Reset Signal, SYSRST. The
following is a list of device Reset sources:
• POR: Power-on Reset
• MCLR: Pin Reset
• SWR: RESET Instruction
• WDT: Watchdog Timer Reset
• BOR: Brown-out Reset
• TRAPR: Trap Conflict Reset
• IOPUWR: Illegal Opcode Reset
• UWR: Uninitialized W Register Reset
A simplified block diagram of the Reset module is
shown in Figure 5-1.
Any active source of Reset will make the SYSRST sig-
nal active. Many registers associated with the CPU and
peripherals are forced to a known Reset state. Most
registers are unaffected by a Reset; their status is
unknown on POR and unchanged by all other Resets.
FIGURE 5-1:
© 2006 Microchip Technology Inc.
RESETS
MCLR
V
DD
Enable Voltage Regulator
Uninitialized W Register
RESET SYSTEM BLOCK DIAGRAM
Instruction
RESET
Sleep or Idle
Illegal Opcode
Module
WDT
Brown-out
Trap Conflict
V
DD
Detect
Reset
Rise
Glitch Filter
POR
Preliminary
BOR
PIC24FJ128GA FAMILY
All types of device Reset will set a corresponding status
bit in the RCON register to indicate the type of Reset
(see Register 5-1). A POR will clear all bits except for
the BOR and POR bits (RCON<1:0>), which are set.
The user may set or clear any bit at any time during
code execution. The RCON bits only serve as status
bits. Setting a particular Reset status bit in software will
not cause a device Reset to occur.
The RCON register also has other bits associated with
the Watchdog Timer and device power-saving states.
The function of these bits is discussed in other sections
of this manual.
Note:
Note:
Refer to the specific peripheral or CPU
section of this manual for register Reset
states.
The status bits in the RCON register
should be cleared after they are read so
that the next RCON register value after a
device Reset will be meaningful.
SYSRST
DS39747C-page 51