PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 131

• Manufacturer Part Number: PIC24FJ128GA010-I/PT
• Description: IC PIC MCU FLASH 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA010-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 84
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

REGISTER 15-2:
© 2006 Microchip Technology Inc.
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
.
Upper Byte:
bit 15
ACKSTAT
R-0 HSC
D/A: Data/Address bit (when operating as I
1 = Indicates that the last byte received was data
0 = Indicates that the last byte received was device address
Hardware clear at device address match.
Hardware set by write to I2CxTRN or by reception of slave byte.
P: Stop bit
1 = Indicates that a Stop bit has been detected last
0 = Stop bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop detected.
S: Start bit
1 = Indicates that a Start (or Repeated Start) bit has been detected last
0 = Start bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop detected.
R/W: Read/Write bit Information (when operating as I
1 = Read – indicates data transfer is output from slave
0 = Write – indicates data transfer is input to slave
Hardware set or clear after reception of I
RBF: Receive Buffer Full Status bit
1 = Receive complete, I2CxRCV is full
0 = Receive not complete, I2CxRCV is empty
Hardware set when I2CxRCV written with received byte.
Hardware clear when software reads I2CxRCV.
TBF: Transmit Buffer Full Status bit
1 = Transmit in progress, I2CxTRN is full
0 = Transmit complete, I2CxTRN is empty
Hardware set when software writes I2CxTRN.
Hardware clear at completion of data transmission.
Legend:
R = Readable bit
-n = Value at POR
R-0 HSC
TRSTAT
Lower Byte:
bit 7
R/C-0 HS
IWCOL
I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED)
U-0
—
R/C-0 HS
I2COV
C = Clearable bit
‘1’ = Bit is set
U-0
—
R-0 HSC
D/A
Preliminary
2
C device address byte.
2
U-0
C slave)
—
PIC24FJ128GA FAMILY
R/C-0 HSC R/C-0 HSC
U = Unimplemented bit, read as ‘0’
HS = Set in Hardware
‘0’ = Bit is cleared
P
R/C-0 HS
2
C slave)
BCL
S
R-0 HSC
GCSTAT
R-0 HSC
HSC = Hardware Set/Cleared
x = Bit is unknown
R/W
R-0 HSC
ADD10
R-0 HSC
bit 8
RBF
DS39747C-page 129
R-0 HSC
TBF
bit 0