DSPIC30F3011-20I/ML Microchip Technology, DSPIC30F3011-20I/ML Datasheet - Page 3
![IC DSPIC MCU/DSP 24K 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC30F3011-20I/ML
Manufacturer Part Number
DSPIC30F3011-20I/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F3010-30ISO.pdf
(228 pages)
2.DSPIC30F3010-30ISO.pdf
(18 pages)
3.DSPIC30F3010-30ISO.pdf
(6 pages)
4.DSPIC30F3010-30ISO.pdf
(16 pages)
5.DSPIC30F3010-30ISO.pdf
(22 pages)
6.DSPIC30F3010-20ISP.pdf
(226 pages)
Specifications of DSPIC30F3011-20I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301120IML
- DSPIC30F3010-30ISO PDF datasheet
- DSPIC30F3010-30ISO PDF datasheet #2
- DSPIC30F3010-30ISO PDF datasheet #3
- DSPIC30F3010-30ISO PDF datasheet #4
- DSPIC30F3010-30ISO PDF datasheet #5
- DSPIC30F3010-20ISP PDF datasheet #6
- Current page: 3 of 226
- Download datasheet (4Mb)
High-Performance Modified RISC CPU:
• Modified Harvard Architecture
• C Compiler Optimized Instruction Set Architecture
• 83 Base Instructions
• 24-Bit Wide Instructions, 16-Bit Wide Data Path
• 24 Kbytes On-Chip Flash Program Space
• 1 Kbyte of On-Chip Data RAM
• 1 Kbyte of Nonvolatile Data EEPROM
• 16 x 16-Bit Working Register Array
• Up to 30 MIPs Operation:
• 29 Interrupt Sources
DSP Engine Features:
• Dual Data Fetch
• Accumulator Write Back for DSP Operations
• Modulo and Bit-Reversed Addressing modes
• Two, 40-Bit Wide Accumulators with Optional
• 17-Bit x 17-Bit Single-Cycle Hardware Fractional/
• All DSP Instructions Single Cycle
• ±16-Bit Single-Cycle Shift
© 2008 Microchip Technology Inc.
Note:
with Flexible Addressing modes
(8K instruction words)
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with
- 3 external interrupt sources
- 8 user-selectable priority levels for each
- 4 processor trap sources
saturation Logic
Integer Multiplier
PLL active (4x, 8x, 16x)
interrupt source
High Performance, 16-Bit Digital Signal Controllers
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and gen-
eral device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “dsPIC30F/33F Programmer’s
Reference Manual” (DS70157).
dsPIC30F3010/3011
Peripheral Features:
• High-Current Sink/Source I/O Pins: 25 mA/25 mA
• Timer module with Programmable Prescaler:
• 16-Bit Capture Input Functions
• 16-Bit Compare/PWM Output Functions
• 3-Wire SPI modules (supports 4 Frame modes)
• I
• 2 UART modules with FIFO Buffers
Motor Control PWM Module Features:
• 6 PWM Output Channels
• 3 Duty Cycle Generators
• Dedicated Time Base
• Programmable Output Polarity
• Dead-Time Control for Complementary mode
• Manual Output Control
• Trigger for A/D Conversions
Quadrature Encoder Interface Module
Features:
• Phase A, Phase B and Index Pulse Input
• 16-Bit Up/Down Position Counter
• Count Direction Status
• Position Measurement (x2 and x4) mode
• Programmable Digital Noise Filters on Inputs
• Alternate 16-Bit Timer/Counter mode
• Interrupt on Position Counter Rollover/Underflow
Analog Features:
• 10-Bit Analog-to-Digital Converter (ADC) with
• Programmable Brown-out Reset
- Five 16-bit timers/counters; optionally pair
and 7-Bit/10-Bit Addressing
- Complementary or Independent Output
- Edge and Center-Aligned modes
4 S/H Inputs:
- 1 Msps conversion rate
- 9 input channels
- Conversion available during Sleep and Idle
2
C
16-bit timers into 32-bit timer modules
modes
TM
module Supports Multi-Master/Slave mode
DS70141E-page 1
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