DSPIC30F3011-20I/ML Microchip Technology, DSPIC30F3011-20I/ML Datasheet
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DSPIC30F3011-20I/ML
Specifications of DSPIC30F3011-20I/ML
Related parts for DSPIC30F3011-20I/ML
DSPIC30F3011-20I/ML Summary of contents
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... These devices may be identified by the following message that appears in the MPLAB Window under MPLAB IDE, when a “Reset and Connect” operation is performed within MPLAB IDE: Setting Vdd source to target Target Device dsPIC30F3011 found, revision = Rev 0x1002 ...Reading ICD Product ID Running ICD Self Test ...Passed ...
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... The PLL LOCK Status bit (OSCCON<5>) can occasionally get cleared and generate an Oscillator Failure Trap even when the PLL is still locked and functioning correctly. The following sections describe the errata and work around to these errata, where they may apply. ® DSC , DD © 2008 Microchip Technology Inc. ...
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... Adding an accumulator write back (a dummy write back if needed) to either of the MAC class instructions not use the + = address modification not prefetch data from Y data space. © 2008 Microchip Technology Inc. dsPIC30F3010/3011 2. Module: CPU – Instruction DAW.b The Decimal Adjust instruction, DAW.b, may improperly clear the Carry bit, C (SR< ...
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... Result in W4 (3) SR<1:0> bits , Result in W2 (3) SR<1:0> bits (4) SR<15:10> bits CORRECT RESULTS ;Load PSVPAG register ;Enable PSV ;Set up W1 for ;indirect PSV access ;from 0x000200 ;works ok ;Load W2 with data ;from program memory ;Carry flag and W4 ;results are ok! © 2008 Microchip Technology Inc. ...
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... For details on the functionality of the EDT bit, see Section 2.9.2.4 “Early Termination of the DO Loop” in the “dsPIC30F Family Reference Manual” (DS70046). © 2008 Microchip Technology Inc. dsPIC30F3010/3011 6. Module: 4x PLL Operation When the 4x PLL mode of operation is selected, the specified input frequency range of 4-10 MHz is not fully supported ...
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... One may use a large DISI value and then set the DISICNT register to zero, as shown in Example 6. A macro may also be used to perform this task, as shown in Example 7. // protect CPU IPL modification // set CPU IPL remove DISI protection // safely modify the CPU IPL © 2008 Microchip Technology Inc. ...
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... Timer may be enabled prior to entering Sleep mode. When the Watchdog Timer expires, code execution will resume from the instruction immediately following the SLEEP instruction. © 2008 Microchip Technology Inc. dsPIC30F3010/3011 10. Module: Output Compare in PWM Mode If the desired duty cycle is 0 (OCxRS = 0), the ...
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... Module: 8x PLL Mode POSRES bit If 8x PLL mode is used, the input frequency range is 5 MHz-10 MHz instead of 4 MHz-10 MHz. Work around None PLL is used, make sure the input crystal or clock frequency is 5 MHz or greater. © 2008 Microchip Technology Inc. ...
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... AD (1) 750 ksps Up to 153. 500 ksps Up to 256. 300 ksps Work around None. © 2008 Microchip Technology Inc. dsPIC30F3010/3011 R Max V Temperature S DD 500Ω 4.5V to 5.5V -40°C to +85°C 5.0 kΩ 4.5V to 5.5V -40°C to +125°C 5.0 kΩ 3.0V to 5.5V -40° ...
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... POSCNT, the variable will toggle bit 15. Example 8 shows the code required for this global variable. // Instead of 0xFFFF // Clear QEI interrupt flag // x=2 for dsPIC30F // x=3 for dsPIC33F © 2008 Microchip Technology Inc. ...
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... For example, if the SDA and SCL pins are shared with the UART and SPI pins, and the UART has higher precedence on the port latch pin. © 2008 Microchip Technology Inc. dsPIC30F3010/3011 18. Module 10-bit Addressing mode, some address matches don't set the RBF flag or load the receive register I2CxRCV, if the lower address byte matches the reserved addresses ...
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... If the D_A flag and the I2COV flag are both set, a valid data byte was received and a previous valid data byte was lost. It will be necessary to code for handling this overflow condition. © 2008 Microchip Technology Inc slave interrupt 2 C nodes. ...
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... CPU execution is halted (after a breakpoint is reached), PTMR will start counting PTDIR was zero. Work around None. © 2008 Microchip Technology Inc. dsPIC30F3010/3011 25. Module: Timer When the timer is being operated in Asynchronous mode using the secondary oscillator (32.768 kHz) and the device is put into Sleep mode, a clock ...
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... APPENDIX A: REVISION HISTORY Revision A (8/2008) Original version of the document. Revision B (9/2008) Updated issue 26 (PLL Lock Status Bit). DS80389B-page 14 © 2008 Microchip Technology Inc. ...
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... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...