PIC16F84A-20/SO Microchip Technology, PIC16F84A-20/SO Datasheet - Page 261

IC MCU FLASH 1KX14 EE 18SOIC

PIC16F84A-20/SO

Manufacturer Part Number
PIC16F84A-20/SO
Description
IC MCU FLASH 1KX14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F84A-20/SO

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
1
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3-DB16F84A - BOARD DAUGHTER ICEPIC3309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F84A-20/SO
Quantity:
5 040
16.3.5
1997 Microchip Technology Inc.
SSPIF
Interrupt flag
SCK
(CKP = 0)
SCK
(CKP = 1)
Slave Operation
SDO
SDI
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched the SSPIF interrupt flag bit is set.
The clock polarity is selected by appropriately programming the CKP bit (SSPCON<4>). This
then would give waveforms for SPI communication as shown in
where the MSb is transmitted first. When in slave mode the external clock must meet the mini-
mum high and low times.
In sleep mode, the slave can transmit and receive data and wake the device from sleep if the
interrupt is enabled.
Figure 16-4: SPI Mode Waveform (Slave Mode w/o SS Control)
bit7
bit7
bit6
bit5
bit4
bit3
Section 16. BSSP
bit2
bit1
Figure 16-5
DS31016A-page 16-11
bit0
bit0
and
Next Q4 Cycle
Figure 16-5
after Q2
16

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