PIC16F84A-20/SO Microchip Technology, PIC16F84A-20/SO Datasheet - Page 210

IC MCU FLASH 1KX14 EE 18SOIC

PIC16F84A-20/SO

Manufacturer Part Number
PIC16F84A-20/SO
Description
IC MCU FLASH 1KX14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F84A-20/SO

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
1
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3-DB16F84A - BOARD DAUGHTER ICEPIC3309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F84A-20/SO
Quantity:
5 040
PICmicro MID-RANGE MCU FAMILY
14.5
DS31014A-page 14-8
PWM Mode
In Pulse Width Modulation (PWM) mode, the CCPx pin produces up to a 10-bit resolution PWM
output. Since the CCPx pin is multiplexed with the PORT data latch, the corresponding TRIS bit
must be cleared to make the CCPx pin an output.
Figure 14-3
For a step by step procedure on how to set up the CCP module for PWM operation, see Subsec-
tion
Figure 14-3: Simplified PWM Block Diagram
A PWM output
cycle). The frequency of the PWM is the inverse of the period (1/period).
Figure 14-4: PWM Output
Note:
14.5.3 “Set-up for PWM Operation.”
Note 1:
Timer2 Module
CCP Module
Clearing the CCPxCON register will force the CCPx PWM output latch to the default
low level. This is not the port I/O data latch.
shows a simplified block diagram of the CCP module in PWM mode.
(Figure
8-bit timer is concatenated with 2-bit internal Q clock or 2 bits of the prescaler to
create 10-bit time-base.
CCPRxH (Slave)
(DCxB9:DCxB2)
Comparator
CCPRxL
14-4) has a time-base (period) and a time that the output stays high (duty
Duty cycle registers
PR2
TMR2
Comparator
8
8
10
TMR2 = PR2 + 1, TMR2 forced to 0h
10
10
Duty Cycle =
DCxB9:DCxB0
(Note 1)
Period = PR2 + 1
Clear Timer, CCPx pin
and latch the Duty Cycle
TMR2 = Duty Cycle
CCPxCON<5:4>
(DCxB1:DCxB0)
TMR2 = PR2 + 1, TMR2 forced to 0h
R
S
Q
TRIS<y>
1997 Microchip Technology Inc.
CCPx

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